MIL-PRF-38535K
APPENDIX H
H.3.1.10 Manufacturer’s Responsibility. It is the manufacturer’s responsibility to ensure all of the defined systems and
controls are fully implemented and operational as defined in this specification, appendices, and applicable standards and
specifications. The manufacturer shall provide a focal point representative for the coordination and communication of QML
program.
H.3.1.11 Qualifying Activity (QA) Responsibility. The QA is responsible for the coordination between the government
agencies in the performance of quality audits and report approvals. The QA shall consolidate concerns and observations from
the various agencies to provide a jointly agreed to position to provide to the manufacturer in addressing audit deficiencies and
in meeting the specified requirements.
Any request for data, additional testing, or new manufacturing requirements, for a QML manufacturer, that were not part of
the QA approved certification, qualification test plan, or DLA Land and Maritime audit results, must be provided to and approved
by the QA. Supporting data for the request shall also be provided to the QA. Upon approval by the QA, the QA shall submit the
request or requirement to the QML manufacturer. The QA shall arrange any necessary conference calls or site visits with the
QML manufacturer.
H.3.2 Certification.
H.3.2.1 Design, Wafer Fabrication, Assembly, and Test Certification. The QA shall perform certification validation of the
Design, Wafer Fabrication, Assembly, and Test capabilities of the manufacturer. The QA validation shall include analysis of
data, and demonstration of the manufacturer’s capability, to meet the requirements for certification in the following areas:
H.3.2.1.1 Design. The manufacturer should address the design methodology for the following areas of design.
NOTE: These are also applicable to third party design centers.
H.3.2.1.1.1 Circuit design. QML microcircuits should address the circuit design requirements and performance
characteristics herein:
a. Model verification. Provide evidence that all models utilized in the design process are functional, predictable, and
accurate over the worst case temperature and electrical extremes. Examples of these models are: electrical
(transistor, passives, interconnect, package), behavioral, logic, fault, timing, signal integrity, power estimation and
thermal conductivity.
b. Layout verification. Demonstrate the capability of the automated or manual procedures routinely used for design,
electrical, and reliability rule checking to catch all known errors, singularly and in combination. These rules cover, as a
minimum:
(1) Design rules check (DRC): Geometric and physical.
(2) Electrical rules check (ERC): Shorts and open, connectivity.
(3) Reliability rules: Electromigration and current density, IR drops, latch-up, single event upset (SEU), hot carrier
injection (HCI), electrostatic discharge (ESD), burnout backgating (for gallium arsenide (GaAs) technology).
c. Performance verification. The manufacturer should design and construct a chip or set of chips to assess the process
capability to perform routing and to accurately predict post-routing performance. The manufacturer should
demonstrate that the actual measured performance for each function over temperature and voltage falls between the
two worst case performance limits or is covered by statistical models. All critical minimum geometric and electrical
design rules should be stressed via devices or structures located on the SEC, TCV, or PMs. The electrical stress
requirements for the transistors, passive devices and interconnects on these structures should be determined by worst
case circuit conditions. Failure analysis (FA) should be conducted to identify the failure mechanisms occurring in any
failed devices and/or structures. Corrections to the design or to the verification/screening method shall be undertaken
to mitigate any future occurrences of failures. These changes shall be presented to the QA prior to implementation if
part of a new technology test plan. It is allowed that the manufacturer may choose actual product for their TCV or
SEC. The manufacturer shall demonstrate burn-in circuits and life test conditions through characterization efforts to
ensure proper operation at the device specified frequency.
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ACTEL [ Actel Corporation ]
