MIL-PRF-38535K
APPENDIX G
q. Wafer acceptance criteria.
r. TCV and how it is tested.
s. Sample plans (quantity and acceptance numbers).
t. Gate formation process, material, technique.
u. Backside process to include wafer thinning and backside metallization.
v. Ohmic contact formation.
w. Starting material qualification (e.g., gallium arsenide (GaAs) boule).
x. Lot formation.
G.3.4.3 Assembly process change. Changes in the assembly process to be evaluated by the TRB shall include,
but not be limited to, changes in the following areas:
a. Die attach material, method, or location.
b. Wire/ribbon bond interconnect method.
c. Wire material composition and dimensions.
d. Seal technique (materials or sealing process, gas composition (e.g., for RHA)).
e. Implementation procedures for internal visual and other test methods.
f. Assembly flow.
g. Assembly operation move.
h. Scribing and die separation method.
i. TCI procedures including manufacturer imposed tests.
j. Screening tests.
k. Sample plans (quantity and acceptance numbers).
l. Die back surface preparation.
m. Bond pad geometry, spacing, or metallization.
n. Molding material, method, or location.
o. Chip encapsulation/coating material and technique.
p. Device marking process.
q. Lot formation.
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