MIL-PRF-38535K
TABLE IA. Screening procedure for hermetic classes Q, V and non-hermetic class Y microcircuits - Continued.
18/ Final electrical testing of microcircuits shall assure that the microcircuits tested meet the electrical requirements of the device
specification and shall include the tests of table III, group A, subgroups 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, and 11, unless otherwise
specified in the device specification. For solder termination devices, ball grid array (BGA) packages electrical test shall be
performed across the full military temperature range after attachment of the solder balls on the package, and for colmun grid
array (CGA) packages, electrical test shall be performed across the full military temperature range before attachment of the
solder columns on the package. After column attach, electrical test shall be performed at 25°C (Group A, subgroup 1) as a
minimum to verify that no electrical/mechanical damage has been introduced due to the column attach process.
19/ Functional tests shall be conducted at input test conditions as follows: VIH = VIH(min) +20 percent, -0 percent; VIL = VIL(max) +0
percent, -50 percent; as specified in the most similar military detail specification. Devices may be tested using any input voltage
within this input voltage range but shall be guaranteed to VIH(min) and VIL(max).
CAUTION: To avoid test correlation problems, the test system noise (e.g., testers, handlers, etc.) should be verified to assure
that VIH(min) and VIL(max) requirements are not violated at the device terminals.
20/ The fine and gross leak seal tests shall be performed separately or together, between constant acceleration and external visual
inspection test. For class level S and class level B devices, all device lots (sublots) having any physical processing steps (e.g.,
lead shearing, lead forming, solder dipping to the glass seal, change of, or rework to, the lead finish, etc.) performed following
seal or external visual inspection shall be retested for hermeticity and visual defects. This shall be accomplished by performing,
and passing, as a minimum, a sample seal test (method TM 1014) using an acceptance criteria of a quantity (accept number) of
116(0), and an external visual inspection (method TM 2009) on the entire inspection lot (sublot). For devices with leads that are
not glass-sealed and that have a lead pitch less than or equal to 1.27 mm (0.050 inch), the sample seal test shall be performed
using an acceptance criteria of a quantity (accept number) of 15(0). If the sample fails the acceptance criteria specified, all
devices in the inspection lot represented by the sample shall be subjected to the fine and gross seal tests and all devices that fail
shall be removed from the lot for final acceptance. For class level S devices, with the approval of the qualifying activity, an
additional room temperature electrical test may be performed subsequent to seal, but before external visual, if the devices are
installed in individual carriers during electrical test.
21/ The radiographic and/or C-SAM screening test may be performed in any sequence after serialization. Only one view is required
for flat packages and leadless chip carriers having lead (terminal) metal on four sides. For flip chip technology, only C-SAM
inspection is required. C-SAM inspection may be performed in any sequence after underfill cure for flip chip technology.
For additional requirements for this test, see appendix B paragraph B.4.1 of MIL-PRF-38535.
22/ External visual inspection shall be performed on the lot any time after radiographic test and prior to shipment, and all shippable
samples shall have external visual inspection at least subsequent to qualification or quality conformance inspection testing.
23/ The manufacturer shall inspect the devices 100 percent or on a sample basis using a quantity/accept number of 116(0). If one or
more rejects occur in this sample, the manufacturer may double the sample size with no additional failures allowed or inspect the
remaining devices 100 percent for the failed criteria and remove the failed devices from the lot. If the double sample also has
one or more failures, the manufacturer shall be required to 100 percent inspect the remaining devices in the lot for the failed
criteria. Re-inspection magnification shall be no less than that used for the original inspection for the failed criteria.
24/ Samples shall be randomly selected from the assembled inspection lot for testing in accordance with the specific device class
and lot requirements of Group A, B, C, D, E and applicable appendices of MIL-PRF-38535 or TM 5005 of MIL-STD-883;
after the specified screen requirements herein table IA or TM 5004 have been satisfactorily completed.
25/ Radiation dose rate induced latch-up screen test shall be conducted when specified in purchase order or contract. Dose rate
induced latch-up screen test is not required when radiation induced latch-up is verified to be not possible such as SOI, SOS and
dielectrically isolated technology devices. If radiation dose rate induced latch-up screen test is required, it may be performed at
any screening operation step after seal test, at the manufacturer's option. Test conditions, temperature, and the electrical
parameters to be measured pre, post, and during the test shall be in accordance with the device specification. The PDA for each
inspection lot for class V or class Y (class level S) sublot submitted for radiation latch-up test shall be 5 percent or one device,
whichever is greater.
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ACTEL [ Actel Corporation ]
