MIL-PRF-38535K
APPENDIX C
TABLE C-I. Group E (RHA) TCI/QCI test for class Q, class V and class Y.
MIL-STD-883 test method and conditions
Minimum sample size quantity (accept no.)
Tests
1/ 2/
Subgroups
Class Q
Class V
Class Y
(class level B)
(class level S)
(class level S)
Subgroup 1
Neutron irradiation test
(Displacement Damage test)
a. Qualification test
3/ 4/
a.TM 1017 at 25°C
2(0) devices/wafer or
5(0) devices/wafer lot or
11(0) devices/inspection lot
5/
a.TM 1017 at 25°C
2(0) devices/wafer or
11(0) devices/wafer lot 6/
a.TM 1017 at 25°C
2(0) devices/wafer or
11(0) devices/wafer lot 6/
b. QCI/TCI test
b. TM 1017 at 25°C
2(0) devices/wafer or
5(0) devices/wafer lot or
11(0) devices/inspection lot
5/
b. TM 1017 at 25°C
2(0) devices/wafer or
11(0) devices/wafer lot 6/
b. TM 1017 at 25°C
2(0) devices/wafer or
11(0) devices/wafer lot 6/
c. Endpoint electrical
parameters test
c. As specified in
accordance with device
specification
c. As specified in
accordance with
device specification
c. As specified in
accordance with
device specification
Subgroup 2
3/ 7/ 9/ 10/
Total ionization dose (TID)
a. Qualification test
a. TM 1019 at 25°C
a.TM 1019 at 25°C
a.TM 1019 at 25°C
maximum supply voltage
2(0) devices/wafer or
5(0) devices/wafer lot or
maximum supply voltage
2(0) devices/wafer or
22(0) devices/wafer lot or
maximum supply voltage
2(0) devices/wafer or
22(0) devices/wafer lot or
1(0) devices/wafer +
22(0) devices/inspection lot 1(0) devices/wafer +
8/
4(0) SEC or test structures/ 4(0) SEC or test structures/
wafer or
wafer or
5(0)devices/wafer lot +
5(0)devices/wafer lot +
4(0) SEC or test structures/ 4(0) SEC or test structures/
wafer
wafer
b. TM 1019 at 25°C
b.TM 1019 at 25°C
b.TM 1019 at 25°C
b. QCI/TCI test
maximum supply voltage
2(0) devices/wafer or
5(0) devices/wafer lot or
maximum supply voltage
2(0) devices/wafer or
22(0) devices/wafer lot or
maximum supply voltage
2(0) devices/wafer or
22(0) devices/wafer lot or
1(0) devices/wafer +
22(0) devices/inspection lot 1(0) devices/wafer +
8/
4(0) SEC or test structures/ 4(0) SEC or test structures/
wafer or
wafer or
5(0)devices/wafer lot +
5(0)devices/wafer lot +
4(0) SEC or test structures/ 4(0) SEC or test structures/
wafer
wafer
c. As specified in
accordance with device
specification
c. As specified in
accordance with device
specification
c. As specified in
accordance with device
specification
c. Endpoint electrical
parameters test
116
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