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5962-0422103QXC 参数 Datasheet PDF下载

5962-0422103QXC图片预览
型号: 5962-0422103QXC
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 2000000 Gates, 32256-Cell, CMOS, CQFP352, CERAMIC, QFP-352]
分类和应用: 可编程逻辑
文件页数/大小: 217 页 / 1554 K
品牌: ACTEL [ Actel Corporation ]
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MIL-PRF-38535K  
TABLE II. Group B tests (Mechanical and environmental test) . – Continued.  
1/ Electrical reject devices from the same inspection lot may be used for all subgroups when end-point measurements are not required  
provided that the rejects are processed identically to the inspection lot through pre burn-in electrical and provided the rejects are  
exposed to the full temperature/ time exposure of burn-in. Group B test shall be performed on each inspection lot as a condition for lot  
acceptance for delivery. Group B test shall be performed on each qualified package type and lead finish.  
2/ Resistance to solvents testing required only on devices using inks or paints as a marking medium. For devices with solder  
terminations, Resistance to solvents test shall be performed with balls/columns.  
3/ Not required for qualification or quality conformance inspections where group D inspection is being performed on samples from the  
same inspection lot. For devices with solder terminations, Physical dimension test shall be performed with balls/columns.  
4/ This test is required only, if it is a glass-frit-sealed package. Unless handling precautions for beryllia packages are available and  
followed TM 1018, procedure 3 shall be used (see group D, subgroup 6 of table V). For class Y non-hermetic microcircuits devices  
Internal water vapor content test is not applicable.  
5/ Test three devices; if one fail, test two additional devices with no failures. At the manufacturers option, if the initial test sample (e.g., 3  
or 5 devices) fails, a second complete sample may be tested at an alternate laboratory that has been granted current suitability status  
by the qualifying activity. If this sample passes, the lot shall be accepted provided the devices and data from both submissions is  
submitted to the qualifying activity along with five additional devices from the same lot. If sample size (accept number) of 5(1) is used  
to pass the lot, the manufacturer shall evaluate their product to determine the reason for the failure and whether the lot is at risk.  
6/ For all devices, except flip chip, the die shear test or substrate attach strength or stud pull test including passive elements shall be  
performed per TM 2019 or TM 2027, as applicable. For flip chip devices, flip chip pull off test shall be performed per TM 2031 or  
TM 2011. Flip chip die shear test or substrate attach strength test shall be performed after underfill is cured per TM 2019 or TM 2027.  
If the flip chip device uses passive elements the substrate attach strength or stud pull test shall also be performed per TM 2019 or  
TM 2027. For solder termination devices, subgroup 2 test may be performed without balls and columns attached.  
7/ Unless otherwise specified, the sample size number for condition C or D is the number of bond pulls selected from a minimum number  
of 4 devices, and for condition H is the number of dice (not bonds) (see TM 2011).  
8/ All devices submitted for solderability test shall be in the lead finish that will be on the shipped product and which has been through the  
temperature/time exposure of burn-in except for devices which have been hot solder dipped or undergone tin-lead fusing after burn-in.  
The sample size number applies to the number of leads inspected except in no case shall less than 3 (three) devices be used to  
provide the number of leads required. For BGA/CGA packages, solderability test shall be verified after solder ball or solder column  
attachment processes per TM 2003. For CGA packages, solder temperature shall be maintained in accordance with table 1 of  
TM 2003.  
9/ The sample size number of 45 for lead integrity shall be based on the number of leads or terminals tested and shall be taken from a  
minimum of 3 devices. All devices required for the lead integrity test shall pass the seal test and lid torque test, if applicable, (see 10/)  
in order to meet the requirements of subgroup 4. For pin grid array leads and rigid leads, use TM 2028. For leaded chip carrier  
packages, use condition B1. For leadless chip carrier packages only, use test condition D and a sample size number of 15 based on  
the number of pads tested taken from 3 devices minimum. Seal test (subgroup 4b) need to be performed only on packages having  
leads exiting through a glass seal. For LGA/BGA/CGA packages, TM 2004 does not apply.  
10/ Lid torque test shall apply only to packages which use a glass-frit-seal to lead frame, lead or package body (e.g., wherever frit seal  
establishes hermeticity or package integrity). Device packages with lid/heat sink attached on the back side of a flip chip die require a  
lid shear or lid torque test. Manufacturers shall submit test procedures for lid shear test for approval of QA. Lid torque test shall be  
performed in accordance with TM 2024.  
11/ Test samples for bond strength may, at the manufacturer's option, unless otherwise specified, be randomly selected prior to or  
following internal visual (PRESEAL) inspection specified in table IA herein or TM 5004, prior to sealing provided all other specifications  
requirements are satisfied (e.g., bond strength requirements shall apply to each inspection lot, bond strength samples shall be counted  
even if the bond would have failed internal visual exam). Unless otherwise specified, the sample size number for condition C or D is  
the number of bond pulls selected from a minimum number of 4 devices, and for condition F or H is the number of dice (not bonds)  
(see TM 2011).  
12/ Read and record group A subgroups 1, 2 and 3.  
13/ The alternate removal-of-bias provisions of 3.3.1 of TM 1005 shall not apply for test temperature above 125°C.  
14/ For devices with solder terminations, Temperature cycling and Constant acceleration test may be performed without balls/columns  
attachment.  
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