MIL-PRF-38535K
APPENDIX H
H.3.4.3 Wafer fabrication technology validation. A manufacturer should have an SEC for the technology or process being
considered for certification. A manufacturer's SEC should be used to demonstrate fabrication process reliability for the
technology. The SEC design documentation should address: The design methodology, the software tools used in the design,
the functions it is to perform, its size in terms of utilized transistor or gate count, and simulations of its performance.
Documentation procedures for the SEC and standard production devices should be the same so that correlation can be made.
The SEC may be designed solely for its role as a quality and reliability monitoring vehicle or it may be a standard product. (For
RHA environment, see appendix C.) The SEC should address the following requirements:
a. Complexity. The complexity of the SEC for digital microcircuits should contain, as a minimum, one-half the number of
transistors expected to be used in the largest microcircuit to be built on the QML line. Digital ASICs should include
one or more test vehicles or SEC that represents all the cells types including memory, and operates at a minimum of
75% of the intended product frequency for burn-in and electrical tests. For analog microcircuits, the SEC should
exercise the functionality of the process technology flow, be of a representative complexity and be comprised of major
circuit element types.
b. Functionality. The SEC should contain fully functional circuits capable of being tested and screened in a manner
identical to the QML microcircuits.
c. Design. The SEC should be designed to stress the design capabilities of the process (see H.3.2.1.1.1c). The
architecture of the SEC should be designed so that failures can be easily diagnosed.
d. Fabrication. The SEC should be processed on a wafer fabrication line that is intended to be, or already is, a certified
QML line.
e. Packaging. The SEC should be packaged in a package qualified in accordance with requirements in 3.4.1.4.1 herein.
NOTES: A different SEC may be required whenever the design rules, the materials, the basic processes, or the basic
functionality of the technology differ.
H.3.4.4 Assembly/Packaging technology validation. The manufacturer shall demonstrate the capability of the assembly
and package processes by qualifying the SEC package or actual product to the package certification and qualification
procedures. The manufacturer shall document how packages used in the manufacture of QML products are grouped together
as a package family for qualification and change control purposes. The technology qualification demonstration shall be
conducted on samples pulled from minimum of 3 different assembly lots for assembly/process technology validation. The
qualification testing shall be conducted in accordance with MIL-PRF-38535 Groups A, B, and D or to the agreed to alternatives
and test optimizations defined in the QM plan.
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