Core1553BBC MIL-STD-1553B Bus Controller
Message Block
An 8-word message block controls each message. The BC reads the 1553B command words from the message block
and will write the received status words back to message block. Message blocks must be positioned on an 8-word
memory boundary (Table 16).
Table 16 • Message Block
Offset
Contents
Written by Description
0
MSGCMD
CPU
Type of 1553B Message
15:10
Inter-message GAP (IMG) after this message, 0 to 63µs.
When 000000, it uses the inter-message gap as set by the BC setup register.
Longer IMG values can be achieved by using the DELAY instruction between
messages.
The actual IMG may be llonger than when set by this register. The BC needs
to perform up to six memory accesses during the IMG period. If the backend
memory responds slowly, then the IMG may increase
9
'0': Normal Operation
'1': The CLOCK value at the mid-point of the data word sync is used as the
data for the synchronize with data mode code.
8:
Bus to use
'0': Bus A
'1': Bus B
7:6
5:4
3:0
Retries on Alternate Bus 0 to 3
Retries on Bus 0 to 3
0000
0001
0110
0010
0011
0101
1000
1110
1010
1101
Others
0
1
6
2
3
5
8
E
BC-to-RT
RT-to-BC
Mode Code with no data
Mode Code RT RX with data
Mode Code RT TX with data
RT-to-RT
Broadcast BC-to-RT
Broadcast Mode Code RT with no data
Broadcast Mode Code RX with data
Broadcast RT-to-RT
A
D
Illegal
1
2
3
CW
CPU
CPU
1553B Command Word. For RT-to-RT messages, this is the RX command word
RT-to-RT TX 1553B Command Word
RTRT TX CW
DATAPTR
CPU or BC
Data
Pointer to memory location containing the 32-word data buffer. Must be on
a 32-word boundary, i.e. bits 4:0 are 00000
Messages
Mode Code
Messages
Mode code data word
4
5
SW
BC
BC
Received status word. For RT-to-RT messages this is the status word from the TX RT
Received status word from the RX RT for RT-to-RT messages
RTRT RX SW
16
v4.0
ACTEL [ Actel Corporation ]
