ACE93C46.56.66
Three-wire Serial EEPROM
Instruction Set for the ACE93C56/66
Address
Data
OP
Code
Instruction SB
Comments
*16
*8
*16
*8
Read data stored in memory,
at specified address
Write enable must precede all
programming modes
Erase memory location
An-A0
READ
EWEN
REASE
WRITE
1
1
1
1
10
00
11
01
A8-A0
A7-A0
11XXXXXX 11XXXXXX
A8-A0
A8-A0
A7-A0
A7-A0
Writes memory location
D7-D0 D15-D0
An-A0
Erases all memory locations.
Valid only at VCC=4.5V to
5.5V
ERAL
1
00
10XXXXXXX 10XXXXXX
Writes all memory locations.
Valid only at VCC=4.5V to
5.5V
WRAL
EWDS
1
1
00
00
01XXXXXXX 01XXXXXX D7-D0 D15-D0
00XXXXXXX 00XXXXXX
Disables all programming
instructions
Notes: The X’s in the address field represent don’t care values and must be clocked.
READ (READ):
The Read (READ) instruction contains the address code for the memory location to be read. After the instruction and
address are decoded, data from the selected memory location is available at the serial output pin DO. Output data
changes are synchronized with the rising edges of serial clock SK. It should be noted that a dummy bit (logic “0”)
precedes the 8- or 16-bit data output string. The ACE93C56/66 supports sequential read operations. The device will
automaticallyincrement theinternal address pointer andclock out the next memorylocation as long as Chip Select (CS)
is held high .In this case ,the dummy bit (logic “0”)will not be clocked out between memory locations, thus allowing for a
continuous steam of datatobe read.
ERASE/WRITE (EWEN):
To assure data integrity, the part automatically goes into the Erase/Write Disable (EWDS) state when power is first
applied. An Erase/Write Enable(EWEN) instruction must be executed first before any programming instructions can be
carried out. Please note that once in the EWEN state, programming remains enabled until an EWDS instruction is
executed or VCC power is removedfrom thepart.
ERASE (ERASE):
The Erase (ERASE) instruction programs all bits in the specified memory location to the logical “1” state. The
self-timed erase cycle starts once the ERASE instruction and address are decoded. The DO pin outputs the
Ready/Busystatus of the part if CS is brought high afterbeing kept lowfor aminimum of 250 ns(TCS). Alogic“1” at pin
DO indicatesthat theselected memorylocationhas been erased, andthepart isreadyfor another instruction.
VER 1.5
7