AL103 Revision 1.0
Reserved Register (Register 03)
This register is reserved for Allayers use. The bits should be set as 0000 0001 0001 0100.
Testing Register (Register 04)
Most of the bits in this register are reserved for factory testing except for the WmarkSel bits. These
bits set the level of buffer to trigger backpressure to eliminate buffer overflow.
Table 23: Testing Register (Register 04)
BIT
NAME
DESCRIPTION
15~12
11~10
Reserved
WmarkSel
Reserved
Backpressure Watermark Select.
00: Backpressure if available block count < 4.
01: Backpressure if available block count < 8.
10: Backpressure if available block count < 16.
11: Backpressure if available block count < 28 (8 Mbit/s SGRAM).
11: Backpressure if available block count < 60 (16 Mbit/s SGRAM).
Each block is 2K byte.
9~0
Reserved
Reserved
Vendor Specific PHY Register (Register 05)
This register is used to program vendor-specific PHY options. It is also used for programming the
Vendor Specific PHY register location and bit location of the operation status.
Table 24: Vendor Specific PHY Register (Register 05)
BIT
NAME
DESCRIPTION
15
14
PHYAD
MclkSpd
Setting this bit to “1” will program the MDIO PHY address to 16 to 23.
Setting this bit to “1” will reduce the MDIO clock speed to 17 KHz.
Setting this bit to “1” will reverse the PHY ID/port number of the switch.
PHY’s Operation Status Register Number.
13
PortOrder
PHYOpReg
PHYSpBit
12~8
7~4
3~0
PHY’s Data Rate Status Register Bit Number.
PHYDxMode PHY’s Operating Duplex Mode Status Register Bit Number.
9/00
Reference Only / Allayer Communications
42
ABC [ ABC Taiwan Electronics Corp ]
