AL103 Revision 1.0
3.15 SGRAM Interface
All ports of the AL103 work in Store-And-Forward mode so that all ports can support both 10
Mbps and 100 Mbps data speed. The AL103 utilizes a central memory buffer pool, which is shared
by all ports within the same device. After a frame is received, it is passed across the SGRAM
interface and stored in the buffer. During transmit, the frame is retrieved from the buffer pool and
forwarded to the destination port.
The AL103 is designed to use 8 Mbit SGRAM or 16 Mbit SGRAM to achieve low cost and high
performance.
The SGRAM is accessed in Page Burst Access Mode for very high-speed access. This burst mode
is repeatedly sent to the same column. If burst mode reaches the end of the column address, it then
wraps around to the first column address (=0) and continues to count until interrupted by the new
read/write, pre-charge, or a burst stop command.
The AL103 will initialize the SGRAM automatically and pre-charges all banks and inserts eight
auto–refresh commands. It will also program the mode registers for the AL103’s read and write
operations.
SGRAM essentially is a SDRAM. Dynamic memories must be refreshed periodically to prevent
data loss. The SGRAM uses refresh address counters to refresh automatically. The SGRAM auto-
refresh command generates a pre-charge command internally in the SGRAM. The AL103 will
insert an auto-refresh command once every 15 microseconds.
4. Register Description
Table 19: Register Tables Summary
REVERSE
REGISTER ID
REGISTER DESCRIPTION
EEPROM
ADDRESS
00
01
System Configuration I
00,01
02,03
04,05
06,07
08,09
0A,0B
0C-19
1A,1B
1C,1D
1E,1F
20,21
System Configuration II
System Configuration III
Reserved
02
03
04
Testing Register
05
Vendor Specific PHY Status
Reserved
06-0C
0D
0E
Port 0 Configuration I
Port 0 Configuration II
Port 1 Configuration I
Port 1 Configuration II
0F
10
9/00
Reference Only / Allayer Communications
36
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