AL103 Revision 1.0
Table 45: SGRAM Write Timing
SYMBOL
tAH
DESCRIPTION
MIN
2
TYP
MAX
UNIT
ns
Access hold time.
Access setup time.
-
-
-
-
-
-
tAS
2.5
1
ns
tCH
PBCS#, PBRAS#, PBWE# hold
time.
ns
tCHI
tCK
Clock high level width.
System clock cycle time.
CKE hold time.
3
13
2
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
tCKH
tCKS
tCL
CKE setup time.
3
Clock low level width.
3
tCS
PBCS#, PBRAS#, PBWE#
setup time.
2.5
tDH
tDS
Data in hold time.
Data in setup time.
1
-
-
-
-
ns
ns
ns
2.5
48
-
tRAS
Active to precharge command
period.
100,000
tRCD
Active to read delay.
24
-
-
ns
Note: This timing requirement is for a SGRAM running at CAS Latency 2. Typically
a -8 speed grade SGRAM needs to be used.
9/00
Reference Only / Allayer Communications
57
ABC [ ABC Taiwan Electronics Corp ]
