AL103 Revision 1.0
Table 26: Port Configuration Register I (Continued)
4
LrnDis
Learning Disable.
0: Source address from this port will be learned.
1: Source address from this port will not be learned.
3~2
1~0
Reserved
Reserved
Must set to 11.
Reserved (Set to 0).
Table 27: Port Configuration Register II
BIT
NAME
DESCRIPTION
15~14
13
Reserved
Reserved
Reserved
Reserved (Set to 0).
12
SkipANDone
Ignore Auto-Negotiation Complete and Wait for Link Up.
11
FlowCtrlFdEn Flow Control Full-duplex Enable.
FlowCtrlHdEn Flow Control Half-duplex Enable.
10
9~6
MDIOCfg[3:0] MDIO Configuration.
0001: Master mode PHY management.
0010: Slave mode PHY management.
0111: Force mode.
5
4
MDIODis
MDIO Disable.
0: MDIO is enabled.
1: MIDO is disabled.
LinkUp
This bit is not relevant when MDIO is enabled. When MDIO is
disabled, this bit forces the port into link up or link down state.
3
2
1
0
PrtMode100F Force 100 Full-duplex Mode.
PrtMode100H Force 100 Half-duplex Mode.
PrtMode10F
PrtMode10H
Force 10 Full-duplex Mode.
Force 10 Half-duplex Mode.
9/00
Reference Only / Allayer Communications
44
ABC [ ABC Taiwan Electronics Corp ]
