Data Sheet
AZ3842/3/4/5
Advanced Analog Circuits
CURRENT MODE PWM CONTROLLER
Pin Configuration
M Package
(SOIC-14)
P/M Package
(DIP-8/SOIC-8)
COMP
N/C
1
2
3
4
5
6
7
14
13
12
11
10
9
VREF
N/C
COMP
1
8
VREF
VFB
VCC
VFB
ISENSE
RT/CT
2
3
4
7
6
5
VCC
N/C
PWR VC
OUTPUT
GND
OUTPUT
GND
ISENSE
N/C
RT/CT
8
PWR GND
Figure 2. Pin Configuration of AZ3842/3/4/5 (Top View)
Pin Description
Pin Number
Pin Name
Function
8-pin
14-pin
1
2
1
3
COMP
VFB
This pin is the Error Amplifier output and is made available for loop compensation.
The inverting input of the Error Amplifier. It is normally connected to the switching
power supply output through a resistor divider.
3
4
5
7
ISENSE
RT/CT
A voltage proportional to inductor current is connected to this input. The PWM uses
this information to terminate the output switch conduction.
The Oscillator frequency and maximum Output duty cycle are programmed by con-
necting resistor RT to VREF and capacitor CT to ground. Operation to 500 kHz is pos-
sible.
5
6
GND
The combined control circuitry and power ground.
10
OUTPUT
This output directly drives the gate of a power MOSFET. Peak currents up to 1.0 A
are sourced and sunk by this pin.
7
8
12
14
VCC
The positive supply of the control IC.
VREF
This is the reference output. It provides charging current for capacitor CT through
resistor RT.
8
PWR GND
PWR VC
This pin is a separate power ground return that is connected back to the power source.
It is used to reduce the effects of switching transient noise on the control circuitry.
11
The Output high state (VOH) is set by the voltage applied to this pin. With a separate
power source connection, it can reduce the effects of switching transient noise on the
control circuitry.
9
GND
N/C
This pin is the control circuitry ground return and is connected back to the power
source ground.
2,4,6,13
No connection. These pins are not internally connected.
March 2003
Rev: 1.0
2