High Efficiency 1X/1.5X/2X Charge
Pump for White LED Applications
independent constant current sinks, the voltage
observed on any single given input will be deter-
mined by the actual forward voltage (V
F
) for the
LED being driven.
Since the input current sinks of the AAT3167 are
programmable, no PWM (pulse width modulation) or
additional control circuitry is needed to control LED
brightness. This feature greatly reduces the burden
on a microcontroller or system IC to manage LED or
display brightness, allowing the user to "set it and
forget it." With its high-speed serial interface (1MHz
data rate), the input sink current of the AAT3167 can
be changed successively to brighten or dim LEDs in
smooth transitions (e.g., to fade-out) or in abrupt
steps, giving the user complete programmability and
real-time control of LED brightness.
The 16 individual current level settings are each
approximately 2dB apart (see Table 1); the spacing
at higher settings is less than 2dB, whereas at lower
settings it is greater. Code 1 is full scale; Code 15 is
full scale attenuated by approximately 30dB; and
Code 16 is reserved as a "no current" setting.
Data
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
AAT3167
AS
2
Cwire Serial Interface
The current sink input magnitude on AAT3167 is con-
trolled by AnalogicTech's AS
2
Cwire serial digital input.
AS
2
Cwire adds addressing capability for multiple
data registers over the Simple Serial Control™
(S
2
Cwire™) interface, which is only capable of con-
trolling a single register. The AAT3167 has four reg-
isters: Bank1, Bank2, Max Current, and Low Current.
Three addresses are used to control the two regis-
ters. Address 0 addresses both registers simulta-
neously to allow the loading of both registers with
the same data using a single write protocol.
Address 1 addresses Register 1 for D1 to D4 cur-
rent level settings. Address 2 addresses Register 2
for D5 current level settings.
AS
2
Cwire relies on the number of rising edges of the
EN/SET pin to address and load the registers.
AS
2
Cwire latches data or address after the EN/SET
pin has been held high for time T
LAT
. Address or data
is differentiated by the number of EN/SET rising
edges. Since the data registers are 4 bits each, the
differentiating number of pulses is 2
4
or 16, so that
Address 0 is signified by 17 rising edges, Address 1
by 18 rising edges, and Address 2 by 19 rising
edges. Data is set to any number of rising edges
between 1 and including 16. A typical write protocol
is a burst of EN/SET rising edges signifying a partic-
ular address, followed by a pause with EN/SET held
high for the T
LAT
timeout period, a burst of rising
edges signifying data, and a T
LAT
timeout for the data
registers. Once an address is set, then multiple
writes consisting of data only (without address) to the
corresponding data register are allowed. Address 0
is the default address on the first rising edge after the
AAT3167 has been disabled. If data is presented on
the first rising edge with no prior address, both data
registers are simultaneously loaded.
The maximum current level is determined by the
value set in Register 3, the Max Current register.
Three scales are available for high operating cur-
rents with maximum current levels of 27mA, 18mA,
or 14mA. Each scale maintains approximately
1.8dB steps between settings. A separate mode is
available for ultra-low LED current operation. When
27mA Max
I
OUT
(mA)
27
22
18
14
12
10
8
6.2
5.2
4.3
3.3
2.9
2.4
1.9
1.4
0
18mA Max
I
OUT
(mA)
18
15
12
10
7.9
6.3
5.1
4.1
3.5
2.9
2.2
1.9
1.6
1.3
1.0
0
14mA Max
I
OUT
(mA)
14
11
8.8
7.1
6.0
4.8
3.8
3.1
2.6
2.1
1.7
1.4
1.2
1.0
0.7
0
Table 1: Current Level Settings.
3167.2007.03.1.4
9
AAT [ ADVANCED ANALOG TECHNOLOGY, INC. ]
