Advanced Analog Technology, Inc
.
May 2008
AAT1168/1168A/1168B
Table 3 K factor Table
Positive and Negative LDO driver
Output Voltage Selection
Best Corner
Frequency
C
K factor
4.692
5.083
6.042
5.230
4.703
21.533µF
25.079µF
32.587µF
36.312µF
38.469µF
23.740 kHz
21.842 kHz
20.095 kHz
15.649 kHz
13.247 kHz
The output voltage of positive LDO driver is set by a
resistive divider from the output (Vout3) to GND with
the center tap connected to the IN3, where VIN3, the
positive LDO driver feedback regulation voltage, is
1.25V. Choose R6 (Figure 8) between 10k
Ω and
51k Ω . And calculate R5 with the following equation.
5. The output filter capacitor is chosen so C RL pole
Vout3
V
−1
R5 = R
6
cancels
R
C
zero
C
C
IN
3
The output voltage of negative LDO driver is set by a
resistive divider from the output (VGL) to VREF with
the center tap connected to the IN2, where VIN2, the
negative LDO driver feedback regulation voltage, is
R
L
εR C = C
C C
+ r , and
C
2
C
R
L
C
=
+ r
C
C
εR
2
C
ε = (1~ 3)
0.25V. Choose R9 (Figure 9) between 10k
Ω and
51k Ω and calculate R8 with the following equation.
Example 3:
= 5V, VO = 13.3V, IO = 300mA, fs = 1,190kHz,
V
IN
VFB = 1.233V,
L
= 6.65µH, Gm = 85µS,
V
− VGL
IN2
R8 = R9
rL
=
76.689
m
Ω
VREF − V
IN2
r
= 9.13m
Ω
RF = 0.7667Ω , C = 1.95nF,
C
C
R
= 7.6k
Ω
,
C
= 38.5µF, ε = 3,
R
= 0.23V/A.
C
CS
Bode Diagram
60
40
20
0
-20
-40
-90
-135
-180
-225
-270
Figure 8. The Positive LDO Driver
102
103
104
Frequency (Hz)
105
106
Figure 7. Bode Plot of Loop Gain Using Matlab®
Simulation
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