Advanced Analog Technology, Inc
.
May 2008
AAT1168/1168A/1168B
plane on the PCB. This will reduce noise and ground
loop errors as well as absorb more of the EMI radiated
by the inductor. For boards with more than two layers,
a ground plane can be used to separate the power
plane and the signal plane for improved performance.
LAYOUT CONSIDERATION
Layout Guide
The system’s performances including switching noise,
transient response, and PWM feedback loop stability
are greatly affected by the PC board layout and
grounding. There are some general guidelines for
layout:
PC Board Layout
Inductor
Always try to use a low EMI inductor with a ferrite core.
Filter Capacitors
Place low ESR ceramics filter capacitors (between
0.1µF and 0.22µF) close to VDD and VREF pins. This
will eliminate as much trace inductance effects as
possible and give the internal IC rail a cleaner voltage
supply. The ground connection of the VDD and VREF
bypass capacitor should be connected to the analog
ground pin (GND) with a wide trace.
Output Capacitors
Place output capacitors as close as possible to the IC.
Minimize the length and maximize the width of traces to
get the best transient response and reduce the ripple
noise. We choose 10µF ceramics capacitor to reduce
the ripple voltage, and use 0.1µF ceramics capacitor to
reduce the ripple noise.
Feedback
If external compensation components are needed for
stability, they should also be placed close to the IC.
Take care to avoid the feedback voltage-divider
resistors’ trace near the SW. Minimize feedback track
lengths to avoid the digital signal noise of TFT control
board.
Ground Plane
The grounds of the IC, input capacitors, and output
capacitors should be connected close to a ground
plane. It would be a good design rule to have a ground
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