Advanced Analog Technology, Inc.
May 2008
PIN NO.
QFN-32
I/O
DESCRIPTION
NAME
OUT2
DLY
28
29
30
31
32
O
I
Negative Charge Pump Output
High Voltage Switch Delay Control
High Voltage Switch Control Pin
CTL
I
ADJ
O
O
Gate High Voltage Fall Time Setting Pin
Switching Gate High Voltage for TFT
VGH
FUNCTION BLOCK DIAGRAM
AAT1168
2
22
VREF
VDD
Fail/ Thermal
Control
Fail
1.233V
Reference Voltage
1.25V
0.25V
SW
Error Amplifier
21
4
IN1
23
24
1. 233V
Digital Control Block
1
GND
EO
Comparator
Current Sense
and Limit
GND
GND2
OUT2
Oscillator
3
11
28
IN2
IN3
27
25
0.25V
OUT3
26
1.25V
VI1-
6
VO1
VO2
VO3
5
8
VI1+
7
9
VI2-
VI2+
10
12
VI3+
13
17
20
14
VI4-
VI4+
VI5-
16
VO4
15
19
VO5
VI5+
18
29
DLY
CTL
VDD1
High Voltage Control
30
31
2.5kΩ
VOUT3
ADJ
1
VGH
32
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Advanced Analog Technology, Inc. –
Version 1.00
Page 10 of 22
AAT [ ADVANCED ANALOG TECHNOLOGY, INC. ]
