IMP1810
Application Information
Operation – Power Monitor
Output Conditions
The DS1810 detects out-of-tolerance power supply conditions. It The IMP1810 active LOW reset signal is valid as long as VCC
resets a processor during power-up, power-down and issues a remains above 1.2V. The RESET output on the IMP1810 uses a
reset to the system processor when the monitored power supply push-pull drive stage that can maintain a valid output below 1.2V.
voltage is below the reset threshold. When an out-of-tolerance VCC To sink current with V below 1.2V, a resistor can be connected
CC
voltage is detected, the RESET signal is asserted. On power-up, from the reset pin (RESET) to Ground (see Figure 1). This config-
RESET is kept active (LOW) for approximately 150ms after the uration will give a valid value on the RESET output with V
CC
power supply voltage has reached the selected tolerance. This approaching 0V. During both power up and down, this configu-
allows the power supply and microprocessor to stabilize before ration will draw current when RESET is in the high state. A value
RESET is released.
of 100kΩ should be adequate to maintain a valid condition.
tR
VCCTP (MAX)
VCCTP
VCCTP (MIN)
IMP1810
Microprocessor
RESET
VCC
tRPU
RESET
VOH
100k
RESET
1810_06.eps
1810_07.eps
Figure 2. Timing Diagram: Power-Up
Figure 1. RESET Valid to 0V VCC
tF
VCC
VCCTP (MAX)
VCCTP
VCCTP (MIN)
tRPD
RESET
VOL
1810_08.eps
Figure 3. Timing Diagram: Power-Down
408-432-9100/www.impweb.com
© 1999 IMP, Inc.
4
A1PROS [ A1 PROS CO., LTD. ]
