Ai339
6. Drive condition
6.1. Power-on conditions
(1) Stating up power supply
1) First bring up the + 3.3 V system, making sure that the ΦSUB pin never becomes lower than the ground potential.
2) After that, bring up the+12.0Vsystem(Φ VH, and VDD ) and the – 6.0 V system (ΦVL and PT ). These levels may
be brought up at the same time, however avoid bringing these levels up extremely rapidly.
3) The only constraint on the time from the point the + 3.3 V system is brought up to the + 12.0 V and – 6.0 V
systems are brought up is that it be long enough for the vertical driver logic system to start up.
(2) Ending power supply
Turn off power supply levels in the reverse order form the application sequence.
1) Bring down the + 12.0 V system (ΦVH, and ADD ) and the – 6.0 V system (ΦVL and PT ).
2) After that, turn off the + 3.3 V system.
(3) Other notes
1) Design applications so that voltage do not exceed the absolute maximum ratings during the power supply startup
transition period.
2) The condition PT ≤ ΦVL must be maintained during the power supply on / off transition periods.
3) Do not connect or disconnect signals to or from the CCD voltage when power supply system are on
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