Advanced Power
Electronics Corp.
PIN DESCRIPTIONS
PIN SYMBOL
V
IN
GND
V
OUT
V
CNTL
REFEN
PIN DESCRIPTION
Power Input Voltage.
Ground Pin
Output Voltage
Gate Drive Voltage
Reference Voltage Input and Chip Enable
AP1270
BLOCK DIAGRAM
VCNTL
VIN
Current Limit
Thermal Protection
REFEN
+
EA
-
VOUT
APPLICATION INFORMATION
Input Capacitor and Layout Consideration
Place the input bypass capacitor as close as possible to the AP1270. A low ESR capacitor
larger than 470uF is recommended for the input capacitor. Use short and wide traces to minimize
parasitic resistance and inductance.
Inappropriate layout may result in large parasitic inductance and cause undesired oscillation
between AP1270 and the preceding powe converter.
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