Advanced Power
Electronics Corp.
APPLICATION INFORMATION
Input Capacitor and Layout Consideration
AP1270AMP
Place the input bypass capacitor as close as possible to the AP1270AMP. A low ESR
capacitor larger than 470uF is recommended for the input capacitor. Use short and wide traces to
minimize parasitic resistance and inductance.
Inappropriate layout may result in large parasitic inductance and cause undesired oscillation
between AP1270AMP and the preceding powe converter.
Consideration while designs the resistance of voltage divider
Make sure the sinking current capability of pull-down NMOS if the lower resistance was
chosen so that the voltage on V
REFEN
is below 0.15V. In addition, the capacitor and voltage divider
form the lowpass filter. There are two reasons doing this design; one is for output voltage soft-
start while another is for noise immunity.
Thermal Consideration
AP1270AMP regulators have internal thermal limiting circuitry designed to protect the device
during overload conditions.For continued operation, do not exceed maximum operation junction
temperature 125
o
C. The power dissipation definition in device is:
P
D
= (V
IN
- V
OUT
) x I
OUT
+ V
IN
x I
Q
The maximum power dissipation depends on the thermal resistance of IC package, PCB
layout, the rate of surroundings airflow and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by following formula:
P
D(MAX)
= ( T
J(MAX)
-T
A
) / R
thja
Where T
J(MAX)
is the maximum operation junction temperature 125
o
C, T
A
is the ambient
temperature and the R
thja
is the junction to ambient thermal resistance. The junction to ambient
thermal resistance (R
thja
is layout dependent) for ESOP-8 package (Exposed Pad) is 75
o
C/W on
standard JEDEC 51-7 (4 layers, 2S2P) thermal test board. The maximum power dissipation at T
A
= 25
o
C can be calculated by following formula:
P
D(MAX)
= (125
o
C - 25
o
C) / 75
o
C/W = 1.33W
The thermal resistance R
thja
of ESOP-8 (Exposed Pad) is determined by the package design
and the PCB design. However, the package design has been decided. If possible, it's useful to
increase thermal performance by the PCB design. The thermal resistance can be decreased by
adding copper under the expose pad of ESOP-8 package. We have to consider the copper
couldn't stretch infinitely and avoid the tin overflow
4
A-POWER [ ADVANCED POWER ELECTRONICS CORP. ]
