A-Data
ADS4616A4A
512K x 16 Bit x 2 Banks
Synchronous DRAM
General Description
Features
•Single 3.3V +/- 0.3V power supply
The ADS4616A4A are two-bank Synchronous
DRAMs organized as 524,288 words x 16 bits x 2
banks,
•MRS Cycle with address key programs
-CAS Latency (2 & 3)
Synchronous design allows precise cycle control
with the use of system clock I/O transactions are
possible on every clock cycle.
Range of operating frequencies, programmable
burst length and programmable latencies allow the
same device to be useful for a variety of high
bandwidth high performance memory system
applications
-Burst Length (1,2,4,8, & full page)
-Burst Type (sequential & Interleave)
•2 banks operation
•All inputs are sampled at the positive edge of
the system clock
•Burst Read single write operation
•Auto & Self refresh
•4096 refresh cycle
•DQM for masking
•Package:50-pins 400 mil TSOP-Type II
Ordering Information.
Part No.
Frequency
200Mhz
166Mhz
143Mhz
Interface
Package
ADS4616A4A-5
ADS4616A4A -6
ADS4616A4A -7
LVTTL
LVTTL
LVTTL
400mil 50pin TSOPII
400mil 50pin TSOPII
400mil 50pin TSOPII
Pin Assignment
V
DD
1
2
Vss
50
49
48
47
DQ0
DQ15
DQ14
3
DQ1
VSSQ
Vss
Q
4
DQ2
5
DQ13
DQ12
46
45
44
6
DQ3
VDDQ
7
VDD
Q
8
DQ11
43
42
DQ4
DQ5
9
DQ10
VSSQ
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
SSQ
V
41
40
39
DQ9
DQ6
DQ8
VDDQ
DQ7
VDDQ
38
37
36
35
NC
LDQM
/WE
UDQM
CLK
/CAS
/RAS
CKE
34
NC
A9
/CS
33
32
31
(BS)A11
A10
A0
A8
A7
A6
30
29
A1
A5
A4
A2
28
27
26
A3
V
SS
VDD
50-pin plastic TSOP II 400 mil
Rev 1 December, 2001
1
ADATA [ ADATA Technology Co., Ltd. ]
