LOW COST - HIGH PERFORMANCE
PHASE LOCKED LOOP
PSN1810A-LF
PAGE 2
VCO TUNING CURVE, typ.
1890
1870
1850
1830
1810
1790
1770
1750
1730
1710
1690
1670
°c
85
°c
°c
25
-40
0
0.5
1
1.5
2
2.5
3
3.5
4
TUNING VOLTAGE (Vdc)
VCO POWER CURVE, typ.
8
7
6
5
4
3
2
1
0
°c
°c
°c
85
25
-40
1697
1723
1746
1768
1790
1812
1834
1855
1876
FREQUENCY (MHz)
PHYSICAL DIMENSIONS
PLL
415-0078 REV. F
(DRAWING NOT TO SCALE)
0.140
14
13
12
NOTES:
1. THE INSIDE RADIUS OF ALL 14 HALF HOLES
AT THE PERIMETER OF THE BOARD ARE
PLATED TO PROVIDE A SURFACE FOR THE
ATTACHMENT OF THE PLL MODULE TO A PCB,
IN 11 LOCATIONS, WITH 3 PADS BEING
1
2
3
11
10
9
TABS RANGE:
SEE NOTE 5.
(4 PLACES)
-0.025
0.000
USED FOR ELECTROMECHANICAL INTERFACE.
14 SOLDER LOCATIONS REQUIRED.
DETAIL A
0.148
0.321
0.495
2. THE SURFACE OF THE SHIELD IS TIN PLATED
AND MAY BE SOLDERED TO. THE SHIELD'S
BASE METAL IS COLD ROLLED STEEL.
3. THE GROUND PLANE IS GROUND AND ATTACHES
TO A GROUND TRACK ON THE UPPER SIDE OF
THE BOARD AS WELL AS THE SHIELD BY PTH.
4
8
BOTTOM
SEE DETAIL A
4. UNLESS OTHERWISE NOTED ALL DIMENSIONS
ARE IN INCHES.
5
6
7
5. UNLESS OTHERWISE NOTED ALL TOLERANCES
ARE AS FOLLOWS:
.070
0.668
0.816
TOLERANCES
.XXX= ± .010
P1 RF OUTPUT
P2 GROUND
0.841
.032
P3 REFERENCE OSCILLATOR INPUT
P4 CLOCK
P5 DATA
P6 LOAD ENABLE
P7 LOCK DETECT
P8 VCC
.015
.030
DETAIL B (TYP)
SEE DETAIL B
P9 OPTIONAL
P10 NO CONNECTION
P11-14 GROUND
Page 2
© Z-Communications, Inc.
Printed in the U.S.A.