LOW COST - HIGH PERFORMANCE
PHASE LOCKED LOOP
PCA0300A-LF
PAGE 2
VCO TUNING CURVE, typ.
340
320
300
280
260
240
220
°c
85
°c
°c
25
-40
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
TUNING VOLTAGE (Vdc)
VCO POWER CURVE, typ.
8
7
6
5
4
3
°c
25
2
1
0
-1
-2
239
262
278
290
300
308
316
324
331
338
FREQUENCY (MHz)
PHYSICAL DIMENSIONS
CPLL
415-0108 REV. A
(DRAWING NOT TO SCALE)
12
NOTES:
11
10
1. THE INSIDE RADIUS OF ALL 12 HALF HOLES
AT THE PERIMETER OF THE BOARD ARE
PLATED TO PROVIDE A SURFACE FOR THE
ATTACHMENT OF THE PLL MODULE TO A PCB
IN 11 LOCATIONS, WITH 8 PADS BEING
USED FOR ELECTROMECHANICAL INTERFACE
AND 3 PADS FOR GROUNDING.
2. THE SURFACE OF THE SHIELD IS TIN PLATED
AND MAY BE SOLDERED TO. THE SHIELD'S
BASE METAL IS COLD ROLLED STEEL.
3. THE GROUND PLANE IS GROUND AND ATTACHES
TO A GROUND TRACK ON THE UPPER SIDE OF
THE BOARD AS WELL AS THE SHIELD BY PTH.
.065
-0.120
0.000
1
9
8
7
TOP
.015
.030
2
3
BOTTOM
0.130
DETAIL B (TYP)
(8 PLACES)
4. UNLESS OTHERWISE NOTED ALL DIMENSIONS
ARE IN INCHES.
5. UNLESS OTHERWISE NOTED ALL TOLERANCES
ARE AS FOLLOWS:
0.260
SEE DETAIL 'A'
0.380
5
4
6
0.032
0.140
.XXX= ± .010
P1 RF OUTPUT
P2 REFERENCE OSCILLATOR INPUT
P3 CLOCK
P4 DATA
P5 LOAD ENABLE
P6 LOCK DETECT
P7 VCC
P8 OPTIONAL
SEE DETAIL 'B'
P9 NO CONNECTION
P10-12 GROUND
TABS RANGE:
SEE NOTE 5
(4 PLACES)
DETAIL A
Page 2
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Printed in the U.S.A.