PCA0090A
14118 Stowe Drive, Suite B | Poway, CA 92064
TEL: (858) 621-2700 | FAX: (858) 486-1927
PHASE LOCKED LOOP
Rev A1
PHASE NOISE (1 Hz BW, typical)
-70
-80
-90
-100
FEATURES
• Frequency Range:
85 - 95 MHz
• Step Size:
50 KHz
• CPLL - Style Package
APPLICATIONS
• Telecommunications
• Satellite
• Telemetry
PERFORMANCE SPECIFICATIONS
Frequency Range
-110
-120
-130
-140
1 E+3
10 E+3
100 E+3
VALUE
85
-
95
-101
-10
-65
0.5±2.5
50
50
1250
<4
4
-40 to 85
CPLL
3.3
25
APPLICATION NOTES
Phase Noise @ 10 kHz offset (1 Hz BW, typ.)
Harmonic Suppression (2nd, typ.)
Sideband Spurs (typ.)
Power Output
Load Impedance
Step Size
Charge Pump Output Current
Switching Speed (typ., adjacent channel)
Startup Lock Time (typ.)
Operating Temperature Range
Package Style
UNITS
MHz
dBc/Hz
dBc
dBc
dBm
kHz
mSec
mSec
°C
POWER SUPPLY REQUIREMENTS
Supply Voltage (Vcc, nom.)
Supply Current (Icc, typ.)
Vdc
mA
All specifications are typical unless otherwise noted and subject to change without notice.
•
AN-107 : How to Solder Z-COMM VCOs / PLLs
•
AN-202 : PLL Functional Description
NOTES:
Reference Oscillator Signal: 5 MHz<
<100 MHz
Frequency Synthesizer: Analog Devices - ADF4001
© Z-Communications, Inc.
Page 1
All rights reserved
ZCOMM [ Z-COMMUNICATIONS, INC ]
