X24164
DEVICE OPERATION
Clock and Data Conventions
DatastatesontheSDAlinecanchangeonlyduringSCL
LOW. SDA state changes during SCL HIGH are re-
served for indicating start and stop conditions. Refer to
Figures 1 and 2.
The X24164 supports a bidirectional bus oriented proto-
col. The protocol defines any device that sends data onto
the bus as a transmitter, and the receiving device as the
receiver. The device controlling the transfer is a master
and the device being controlled is the slave. The master
willalwaysinitiatedatatransfers, andprovidetheclockfor
both transmit and receive operations. Therefore, the
X24164 will be considered a slave in all applications.
Start Condition
All commands are preceded by the start condition,
which is a HIGH to LOW transition of SDA when SCL is
HIGH. The X24164 continuously monitors the SDA and
SCL lines for the start condition and will not respond to
any command until this condition has been met.
Figure 1. Data Validity
SCL
SDA
DATA STABLE
DATA
CHANGE
3846 FHD F07
Notes: (5) Typical values are for T = 25°C and nominal supply voltage (5V)
A
(6) t
is the minimum cycle time from the system perspective when polling techniques are not used. It is the maximum time the
WR
device requires to perform the internal write operation.
Figure 2. Definition of Start and Stop
SCL
SDA
START BIT
STOP BIT
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3
XICOR [ XICOR INC. ]
