X24128
2
Xicor E PROMs are designed and tested for applica-
PIN NAMES
Symbol
tions requiring extended endurance. Inherent data
retention is greater than 100 years.
Description
S0, S1, S2
Device Select Inputs
PIN DESCRIPTIONS
Serial Clock (SCL)
SDA
SCL
WP
Serial Data
Serial Clock
Write Protect
Ground
The SCL input is used to clock all data into and out of
the device.
VSS
Serial Data (SDA)
VCC
NC
Supply Voltage
No Connect
SDA is a bidirectional pin used to transfer data into
and out of the device. It is an open drain output and
may be wire-ORed with any number of open drain or
open collector outputs.
7027 FM T01
PIN CONFIGURATION
An open drain output requires the use of a pull-up
resistor. For selecting typical values, refer to the
Pull-up resistor selection graph at the end of this data
sheet.
Not to scale
14 Lead SOIC
S
S
1
2
0
1
14
13
V
CC
Device Select (S , S , S )
WP
NC
0
1
2
12
11
10
9
NC
3
4
The device select inputs (S , S , S ) are used to set
0
1
2
NC
NC
NC
NC
.344”
the first three bits of the 8-bit slave address. This
allows up to eight devices to share a common bus.
These inputs can be static or actively driven. If used
X24128
5
6
7
S
2
SCL
SDA
V
8
SS
statically they must be tied to V or V
as appro-
SS
CC
priate. If actively driven, they must be driven with
CMOS levels (driven to V or V ).
.244”
CC
SS
Write Protect (WP)
The Write Protect input controls the Hardware Write
Protect feature. When held LOW, Hardware Write
Protection is disabled. When this input is held HIGH,
and the WPEN bit in the Write Protect Register is set
HIGH, the Write Protect Register is protected,
preventing changes to the Block Lock Protection and
WPEN bits.
16 Lead SOIC
S
1
2
0
16
V
CC
S
15
14
13
12
11
1
WP
NC
NC
3
4
NC
NC
NC
NC
NC
.394”
X24128
5
6
7
8
NC
S
2
10
9
SCL
V
SS
SDA
.244”
8 Lead PDIP
S
0
1
2
8
V
CC
WP
S
1
7
6
5
.430”
X24128
S
2
SCL
3
4
V
SS
SDA
7027 FM 02
.325”
2
XICOR [ XICOR INC. ]
