X24022
Page Write
Flow 1. ACK Polling Sequence
The X24022 is capable of an four byte page write
operation. It is initiated in the same manner as the byte
writeoperation,butinsteadofterminatingthewritecycle
after the first data word is transferred, the master can
transmituptothreemorewords.Afterthereceiptofeach
word, the X24022 will respond with an acknowledge.
WRITE OPERATION
COMPLETED
ENTER ACK POLLING
ISSUE
START
Afterthereceiptofeachword, thetwoloworderaddress
bits are internally incremented by one. The high order
five bits of the address remain constant. If the master
shouldtransmitmorethanfourwordspriortogenerating
the stop condition, the address counter will “roll over”
and the previously written data will be overwritten. As
with the byte write operation, all inputs are disabled until
completion of the internal write cycle. Refer to Figure 6
for the address, acknowledge and data transfer
sequence.
ISSUE SLAVE
ADDRESS AND R/W = 0
ISSUE STOP
ACK
NO
RETURNED?
Acknowledge Polling
YES
The disabling of the inputs, during the internal write
operation, can be used to take advantage of the typical
5 ms write cycle time. Once the stop condition is issued
to indicate the end of the host’s write operation the
X24022initiatestheinternalwritecycle.ACKpollingcan
be initiated immediately. This involves issuing the start
condition followed by the slave address for a write
operation. If the X24022 is still busy with the write
operation no ACK will be returned. If the X24022 has
completed the write operation an ACK will be returned
and the master can then proceed with the next read or
write operation (See Flow 1).
NEXT
NO
OPERATION
A WRITE?
YES
ISSUE BYTE
ADDRESS
ISSUE STOP
PROCEED
PROCEED
3848 FHD F11
Figure 6. Page Write
S
T
A
R
T
S
T
O
P
SLAVE
ADDRESS
WORD
ADDRESS (n)
BUS ACTIVITY:
MASTER
DATA n
DATA n+1
DATA n+3
SDA LINE
S
P
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
BUS ACTIVITY:
X24022
NOTE: In this example n = xxxx 0000(B); x = 1 or 0
3848 FHD F12
6
XICOR [ XICOR INC. ]
