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X24001SI-2.7 参数 Datasheet PDF下载

X24001SI-2.7图片预览
型号: X24001SI-2.7
PDF下载: 下载PDF文件 查看货源
内容描述: Identi⑩PROM [Identi⑩PROM]
分类和应用: 存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 13 页 / 49 K
品牌: XICOR [ XICOR INC. ]
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X24001  
PIN DESCRIPTIONS  
Serial Clock (SCL)  
Clock and Data Conventions  
DatastatesontheSDAlinecanchangeonlyduringSCL  
LOW. SDA state changes during SCL HIGH are re-  
served for indicating start and stop conditions. Refer to  
Figures 1 and 2.  
The SCL input is used to clock all data into and out of the  
device.  
Serial Data (SDA)  
Start Condition  
SDA is a bidirectional pin used to transfer data into and  
out of the device. It is a push/pull output and does not  
requiretheuseofapull-upresistor. Duringtheprogram-  
ming operation, SDA is an input.  
All commands are preceded by the start condition,  
which is a HIGH to LOW transition of SDA when SCL is  
HIGH. The X24001 continuously monitors the SDA and  
SCL lines for the start condition and will not respond to  
any command until this condition has been met.  
PIN NAMES  
A start may be issued to terminate the input of a control  
word or the input of data to be written. This will reset the  
device and leave it ready to begin a new read or write  
command. Because of the push/pull output, a start  
cannot be generated while the part is outputting data.  
Starts are also inhibited while a write is in progress.  
Symbol  
Description  
No Connect  
Ground  
NC  
V
SS  
V
CC  
Supply Voltage  
Serial Data  
Serial Clock  
SDA  
SCL  
Stop Condition  
3830 PGM T01  
The stop condition is a LOW to HIGH transition of SDA  
when SCL is HIGH. The stop condition is used to reset  
the device during a command or data input sequence  
and will leave the device in the standby mode. As with  
starts, stops are inhibited when outputting data and  
while a write is in progress.  
DEVICE OPERATION  
The X24001 supports a bidirectional bus oriented proto-  
col. The protocol defines any device that sends data  
ontothebusasatransmitterandthereceivingdeviceas  
the receiver. The device controlling the transfer is a  
master and the device being controlled is the slave. The  
master will always initiate data transfers and provide the  
clock for both transmit and receive operations. There-  
fore, the X24001 will be considered a slave in all appli-  
cations.  
2