Preliminary Information
16k (2k x 8)
2-Wire™ RTC
X1242
Real Time Clock/Calendar/Alarms/CPU Supervisor with EEPROM
FEATURES
DESCRIPTION
• Selectable watchdog timer (0.25s, 0.75s, 1.75s, off)
• Power on reset (250ms)
• Programmable low voltage reset
• 2 polled alarms
The X1242 is a Real Time Clock with calendar/CPU
supervisor circuits and two polled alarms. The dual port
clock and alarm registers allow the clock to operate,
without loss of accuracy, even during read and write
operations.
—Settable on the second, minutes, hour, day,
month, or day of the week
The clock/calendar provides functionality that is con-
trollable and readable through a set of registers. The
clock, using a low cost 32.768kHz crystal input, accu-
rately tracks the time in seconds, minutes, hours, date,
day, month and years. It has leap year correction and
automatic adjustment for months with less than 31
days.
• 2-wire interface interoperable with I2C
—400kHz data transfer rate
• Secondary power supply input with internal
switch-over circuitry
• 2Kbytes of EEPROM
—64-byte page write mode
—3-bit Block Lock™ protection
• Low power CMOS
The X1242 provides a watchdog timer with 3 selectable
time out periods and off. The watchdog activates a
RESET pin when it expires. The reset also goes active
—<1µA operating current
—<3mA active current–EEPROM program
—<400µA active current–EEPROM read
• Single byte write capability
• Typical nonvolatile write cycle time: 5ms
• High reliability
when V
drops below a fixed trip point. There are two
CC
alarms where a match is monitored by polling status bits.
The device offers a backup power input pin. This V
BACK
pin allows the device to be backed up by a non-
rechargeable battery. The RTC is fully operational from
1.8 to 5.5 volts.
• Small package options
—8-lead SOIC package, 8-lead TSSOP package
The X1242 provides a 2Kbyte EEPROM array, giving a
safe, secure memory for critical user and configuration
data. This memory is unaffected by complete failure of
the main and backup supplies.
BLOCK DIAGRAM
X1
Timer
Calendar
Logic
Frequency
Divider
1Hz
32.768kHz
Oscillator
Time
X2
Keeping
Registers
(SRAM)
Control
Decode
Logic
Control/
Status
Compare
Serial
Interface
Decoder
SCL
SDA
Alarm
Registers
Registers
(EEPROM)
(SRAM)
Alarm Regs
(EEPROM)
8
16k (2k x 8)
EEPROM
Array
Watchdog
Timer
Low Voltage
Reset
RESET
Characteristics subject to change without notice. 1 of 24
REV 1.1.7 5/31/01
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XICOR [ XICOR INC. ]
