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5962-9086915MYA 参数 Datasheet PDF下载

5962-9086915MYA图片预览
型号: 5962-9086915MYA
PDF下载: 下载PDF文件 查看货源
内容描述: [EEPROM, 64KX8, 120ns, Parallel, CMOS, 0.560 X 0.458 INCH, 0.120 INCH HEIGHT, LCC-32]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 24 页 / 114 K
品牌: XICOR [ XICOR INC. ]
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512K  
X28C512/X28C513  
64K x 8 Bit  
5 Volt, Byte Alterable E2PROM  
FEATURES  
Two PLCC and LCC Pinouts  
—X28C512  
—X28C010 E PROM Pin Compatible  
—X28C513  
Access Time: 90ns  
2
Simple Byte and Page Write  
—Single 5V Supply  
2
—Compatible with Lower Density E PROMs  
— No External High Voltages or V Control  
PP  
Circuits  
—Self-Timed  
DESCRIPTION  
2
The X28C512/513 is an 64K x 8 E PROM, fabricated  
—No Erase Before Write  
—No Complex Programming Algorithms  
—No Overerase Problem  
Low Power CMOS:  
with Xicor’s proprietary, high performance, floating gate  
CMOS technology. Like all Xicor programmable non-  
volatile memories the X28C512/513 is a 5V only device.  
TheX28C512/513featurestheJEDECapprovedpinout  
for bytewide memories, compatible with industry stan-  
dard EPROMS.  
—Active: 50mA  
—Standby: 500µA  
Software Data Protection  
—Protects Data Against System Level  
Inadvertant Writes  
High Speed Page Write Capability  
Highly Reliable Direct Write™ Cell  
—Endurance: 100,000 Write Cycles  
—Data Retention: 100 Years  
Early End of Write Detection  
DATA Polling  
The X28C512/513 supports a 128-byte page write op-  
eration, effectivelyprovidinga39µs/bytewritecycleand  
enabling the entire memory to be written in less than 2.5  
seconds. TheX28C512/513alsofeaturesDATA Polling  
andToggleBitPolling,systemsoftwaresupportschemes  
used to indicate the early completion of a write cycle. In  
addition, the X28C512/513 supports the Software Data  
Protection option.  
—Toggle Bit Polling  
TSOP  
PIN CONFIGURATIONS  
PLCC / LCC  
1
2
3
4
5
6
7
8
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
A
A
A
A
A
NC  
NC  
NC  
WE  
OE  
A
10  
CE  
11  
9
8
13  
14  
30  
29  
I/O  
I/O  
I/O  
I/O  
I/O  
7
6
5
4
3
4
3
2
32 31  
A
A
5
6
7
8
9
A
A
A
A
A
PLASTIC DIP  
CERDIP  
7
6
5
4
3
2
1
0
0
14  
13  
8
1
28  
27  
26  
25  
24  
23  
22  
FLAT PACK  
SOIC (R)  
A
A
9
9
NC  
NC  
V
X28C512  
(TOP VIEW)  
A
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
V
CC  
NC  
X28C512  
11  
A
OE  
A
SS  
10  
11  
12  
13  
NC  
NC  
1
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
V
CC  
NC  
NC  
NC  
NC  
I/O  
A
10  
2
WE  
NC  
A
CE  
I/O  
NC  
A
A
A
A
A
A
2
1
0
A
3
I/O  
I/O  
I/O  
15  
12  
15  
12  
7
6
5
4
7
15 16 17 18 19 20  
21  
14  
A
4
A
14  
A
A
A
A
0
1
2
3
A
5
A
7
6
5
4
3
2
1
0
0
1
2
13  
A
6
A
8
A
9
3856 FHD F03  
A
7
3856 ILL F22  
A
8
PGA  
A
11  
X28C512  
A
9
OE  
I/O  
15  
I/O  
17  
I/O  
I/O  
21  
I/O  
22  
0
2
3
5
6
30  
19  
4
3
2
32 31  
A
10  
11  
12  
13  
14  
15  
16  
A
A
A
A
A
A
A
A
A
A
A
5
29  
28  
27  
26  
25  
24  
23  
22  
6
5
4
3
2
1
0
8
10  
CE  
24  
A
13  
A
14  
I/O  
16  
V
I/O  
20  
I/O  
23  
1
1
0
1
SS  
4
7
6
9
A
CE  
18  
7
11  
OE  
26  
A
I/O  
7
I/O  
6
I/O  
5
I/0  
4
A
12  
A
11  
A
25  
2
4
3
5
10  
11  
NC  
OE  
A
8
X28C513  
(TOP VIEW)  
I/O  
I/O  
I/O  
V
9
A
10  
A
A
27  
A
28  
9
BOTTOM  
VIEW  
10  
11  
12  
13  
9
7
10  
CE  
I/O  
A
A
A
29  
A
13  
30  
6
7
8
NC  
I/O  
8
6
7
I/O  
I/O  
3
0
6
SS  
15 16 17 18 19 20  
21  
NC  
NC  
32  
A
V
36  
NC  
34  
A
A
31  
15  
CC  
14  
12  
14  
5
4
2
3856 FHD F01  
NC  
NC  
NC  
1
NC  
33  
WE  
35  
3
3856 FHD F04  
3856 FHD F02  
© Xicor, Inc. 1991, 1995, 1996 Patents Pending  
3856-3.1 2/24/99 T1/C0/D0 NS  
Characteristics subject to change without notice  
1