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40430C 参数 Datasheet PDF下载

40430C图片预览
型号: 40430C
PDF下载: 下载PDF文件 查看货源
内容描述: 4k位EEPROM ,三重电压监控器,集成了CPU监控 [4kbit EEPROM, Triple Voltage Monitor with Integrated CPU Supervisor]
分类和应用: 监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 24 页 / 409 K
品牌: XICOR [ XICOR INC. ]
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Preliminary Information  
4kbit EEPROM  
X40430/X40431  
Triple Voltage Monitor with Integrated CPU Supervisor  
FEATURES  
DESCRIPTION  
• Triple voltage detection and reset assertion  
—Three standard reset threshold settings  
(4.6V/2.9V/1.7V, 4.4V/2.6V/1.7V,  
2.9V/1.7V/2.4V)  
—Adjust low voltage reset threshold voltages  
using special programming sequence  
The X40430/31 combines power-on reset control,  
watchdog timer, supply voltage supervision, secondary  
and third voltage supervision, manual reset, and Block  
Lockprotect serial EEPROM in one package. This  
combination lowers system cost, reduces board space  
requirements, and increases reliability.  
—Reset signal valid to V = 1V  
—Monitor three voltages or detect power fail  
• Fault detection register  
• Selectable power on reset timeout  
• Selectable watchdog timer interval  
• Debounced manual reset input  
• Low power CMOS  
—30µA typical standby current, watchdog on  
—10µA typical standby current, watchdog off  
• 4Kbits of EEPROM  
CC  
Applying voltage to V  
activates the power on reset  
CC  
circuit which holds RESET/RESET active for a period of  
time.This allows the power supply and system oscillator  
to stabilize before the processor can execute code.  
Low V  
detection circuitry protects the user’s system  
CC  
from low voltage conditions, resetting the system when  
falls below the minimum V point. RESET/  
V
CC  
TRIP1  
RESET is active until V  
returns to proper operating  
CC  
level and stabilizes. A second and third voltage monitor  
circuit tracks the unregulated supply to provide a  
power fail warning or monitors different power supply  
voltage. Three common low voltage combinations are  
available, however, Xicor’s unique circuits allows the  
threshold for either voltage monitor to be repro-  
grammed to meet special needs or to fine-tune the  
threshold for applications requiring higher precision.  
—16 byte page write mode  
—Self-timed write cycle  
—5ms write cycle time (typical)  
• Built-in inadvertent write protection  
Power-up/power-down protection circuitry  
—Block lock protect 0, 1/4, 1/2, all of EEPROM  
• 400kHz I2C interface  
• 2.4V to 5.5V power supply operation  
• Available packages  
—14-lead SOIC,TSSOP  
BLOCK DIAGRAM  
+
V3MON  
V3FAIL  
V2FAIL  
V
TRIP3  
-
V3 Monitor  
Logic  
+
V2MON  
V
V2 Monitor  
Logic  
TRIP2  
-
Watchdog  
and  
Fault Detection  
Register  
Data  
WDO  
MR  
Reset Logic  
SDA  
WP  
Register  
Status  
Register  
Command  
Decode Test  
& Control  
Logic  
EEPROM  
Array  
SCL  
RESET  
Power on,  
Manual Reset  
Low Voltage  
Reset  
X40430  
RESET  
X40431  
+
V
CC  
V
-
TRIP1  
Generation  
(V1MON)  
V
Monitor  
CC  
Logic  
LOWLINE  
Characteristics subject to change without notice. 1 of 24  
REV 1.2.3 11/28/00  
www.xicor.com