Design Considerations for ISD1700 Family
•
AN-CC1002
Also, avoid running the signal traces close to the V
CCP,
V
SSP1
and V
SSP2
traces.
3.1 Layout Example
V
SSD
V
CCD
V
CCA
IS D 1 7 0 0
V+
Gnd
IS D 1 7 0 0
V+
Gnd
V
CCP
V
SSA
Fig. 1: One side of PCB
V
SSP1
V
SSP2
Fig. 2: Another side of PCB
The above diagrams represent a generic layout for ISD1730 or ISD1760 device as an
example. In the diagrams, the die is magnified in order to review clearly the locations
of the related power and ground pads, as well as the components. Hence, the
illustrations are not in 1:1 ratio.
4. Physical Dimension of PCB
Experiment 1:
The first experiment uses a large PCB. The layout follows the above guidelines with
both 0.1µF and 10µF capacitors installed on all V
CCA
, V
CCD
and V
CCP
power lines. It
produces excellent voice quality on the recorded message.
If 10µF capacitors are removed from all power lines, the voice quality slightly
degrades. However, it may still be acceptable for certain kinds of applications. The
PCB dimension is approximately 4 �½ inches x 3 inches. Fig. 3 shows the 1:1 ratio of
the size of the PCB.
Experiment 2:
In the second experiment which tries to simulate the practical case for mass
production environment, a much smaller PCB is used. When both 0.1µF and 10µF
capacitors are installed on all V
CCA
, V
CCD
and V
CCP
power lines; a very good voice
January, 2006
Page 2 / 3
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