W25M02GV
6. FUNCTIONAL DESCRIPTIONS
6.1 Device Operation Flow
Power Up
Power Up
(default BUF=1, ECC-E=1)
(default BUF=0, ECC-E=1)
Initialization &
Initialization &
Default Page Load (00) ~500us
Default Page Load (00) ~500us
Read
page 00?
Read
page 00?
N
N
Load Page xx
tRD ~50us
Load Page xx
tRD ~50us
Y
Y
Start “Buffer Read” with column address
Start “Continuous Read” from column 0
(Page 00 or Page xx)
(Page 00 or Page xx)
Set BUF=0
Set BUF=1
Load Page yy
tRD ~50us
Load Page yy
tRD ~50us
Start “Continuous Read” from column 0
Start “Buffer Read” with column address
(Page yy)
(Page yy)
W25M02GVxxIG (Die #0)
W25M02GVxxIT (Die #0)
Figure 2c. W25M02GV Flash Memory Operation Diagram
6.1.1 Stacked Die Operations
Once the device is power on, Die #0 will be active and have control of the SPI bus. “Software Die Select
(C2h)” instruction followed by the 8-bit Die ID can be used to select the active die. The active die is
available to accept any instruction issued by the controller and perform specific operations. The
inactive/idle die does not accept any other instructions except the “Software Die Select (C2h)” and “Device
Reset (FFh)”. However, the inactive/idle die can still perform internal Program/Erase operation which was
initiated when the die was active. Therefore, “Read (on Active die) while Program/Erase (on Idle die)” and
“Multi-die Program/Erase (both Active & Idle dies)” concurrent operations are feasible in the SpiStack®
series. “Software Die Select (C2h)” instruction will only change the active/idle status of the stacked dies,
and it will not interrupt any on-going Program/Erase operations.
6.1.2 Standard SPI Instructions
The W25M02GV is accessed through an SPI compatible bus consisting of four signals: Serial Clock
(CLK), Chip Select (/CS), Serial Data Input (DI) and Serial Data Output (DO). Standard SPI instructions
Publication Release Date: July 1, 2015
- 12 -
Preliminary - Revision B
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