ISD5100 – SERIES
6. PIN DESCRIPTION
Pin Name
SCL
A1
SDA
A0
V
SSD
NC
MIC+
V
SSA
MIC-
ANA OUT+
ANA OUT-
ACAP
SP-
SP+
V
CCA
SOIC/PDIP
1
2
3
4
5,6
7,21,22
8
9,15,23
10
11
12
13
14
16
17
TSOP
8
9
10
11
12,13
1,14,28
16
2,15,22
17
18
19
20
21
23
24
Functionality
I
2
C Serial Clock Line: to clock the data into and out of the I
2
C interface.
Input pin that supplies the LSB +1 bit for the I
2
C Slave Address.
I
2
C Serial Data Line: Data is passed between devices on the bus over
this line.
Input pin that supplies the LSB for the I
2
C Slave Address.
Digital Ground.
No Connect.
Differential Positive Input for the microphone amplifier.
Analog Ground.
Differential Negative Input for the microphone amplifier.
Differential Positive Analog Output for ANA OUT.
Differential Negative Analog Output for ANA OUT.
AGC/AutoMute Capacitor: Required for the on-chip AGC amplifier during
record and AutoMute function during playback.
Differential Negative Speaker Output: When the speaker outputs are in
use, the AUX OUT output is disabled.
Differential Positive Speaker Output.
Analog Supply Voltage: This pin supplies power to the analog sections
of the device. It should be carefully bypassed to Analog Ground to
insure correct device operation.
Analog Input: one of the analog inputs with selectable gain.
Auxiliary Input: one of the analog inputs with selectable gain.
Auxiliary Output: one the analog outputs of the device. When this
output is used, the SP+ and SP- outputs are disabled.
Row Address Clock; an open drain output. The RAC pin goes LOW
T
RACL[1]
before the end of each row of memory and returns HIGH at
exactly the end of each row of memory.
Interrupt Output; an open drain output that indicates that a set EOM bit
has been found during Playback or that the chip is in an Overflow (OVF)
condition. This pin remains LOW until a Read Status command is
executed.
This pin allows the internal clock of the device to be driven externally for
enhanced timing precision. This pin is grounded for most applications.
Digital Supply Voltage. These pins supply power to the digital sections
of the device. They must be carefully bypassed to Digital Ground to
insure correct device operation.
ANA IN
AUX IN
AUX OUT
RAC
18
19
20
24
25
26
27
3
INT
25
4
XCLK
V
CCD
26
27,28
5
6,7
[1]
See the
Parameters section
-8-
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