VG26(V)(S)17405FJ
4,194,304 x 4 - Bit
CMOS Dynamic RAM
VIS
DC Characteristics ; 3.3 - Volt Version (Cont.)
(T = 0 to 70°C, VCC= +3.3V (+10%,-5%), V = 0V)
a
SS
VG26(V)(S) 17405
-5 -6
Unit
Notes
Parameter
Symbol
ILI
Test Conditions
Min
-5
Max
Min
-5
Max
Input leakage current
Output leakage current
5
5
0V £ Vin £ VCC + 0.3V
mA
mA
ILO
-5
5
-5
5
0V £ Vout £ VCC + 0.3V
Dout = Disable
Output high Voltage
Output low voltage
VOH
VOL
IOH = -2mA
2.4
-
-
2.4
-
-
V
V
IOL = +2mA
0.4
0.4
Notes:
1. ICC is specified as an average current. It depends on output loading condition and cycle rate when the
device is selected. ICC max is specified at the output open condition.
2. Address can be changed once or less while RAS = VIL.
3. For ICC4, address can be changed once or less within one EDO page mode cycle time.
Document:1G5-0162
Rev.1
Page9
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
