APPLICATION NOTES AND TEST CIRCUIT
Parallel Operation
The BCM will inherently current share when operated in an array. Arrays
may be used for higher power or redundancy in an application.
Current sharing accuracy is maximized when the source and load impedance
presented to each BCM within an array are equal. The recommended
method to achieve matched impedances is to dedicate common copper
planes within the PCB to deliver and return the current to the array, rather
than rely upon traces of varying lengths. In typical applications the current
being delivered to the load is larger than that sourced from the input,
allowing traces to be utilized on the input side if necessary. The use of
dedicated power planes is, however, preferable.
The BCM power train and control architecture allow bi-directional power
transfer, including reverse power processing from the BCM output to its
input. Reverse power transfer is enabled if the BCM input is within its
operating range and the BCM is otherwise enabled. The BCM’s ability to
process power in reverse improves the BCM transient response to an output
load dump.
Anomalies in the response of the source will appear at the output of the
BCM multiplied by its K factor. The DC resistance of the source should be
kept as low as possible to minimize voltage deviations. This is especially
important if the BCM is operated near low or high line as the over/under
voltage detection circuitry could be activated.
Input Fuse Recommendations
VI BRICKs are not internally fused in order to provide flexibility in
configuring power systems. However, input line fusing of VI BRICKs must
always be incorporated within the power system. A fast acting fuse should
be placed in series with the +In port. For agency approvals and fusing
conditions, click on the link below:
Input Impedance Recommendation
s
To take full advantage of the BCM capabilities, the impedance presented
to its input terminals must be low from DC to approximately 5 MHz. The
source should exhibit low inductance (less than 100 nH) and should have a
critically damped response. If the interconnect inductance exceeds 100 nH,
the BCM input pins should be bypassed with an RC damper (e.g., 47 µF in
series with 0.3
Ω)
to retain low source impedance and stable operations.
Given the wide bandwidth of the BCM, the source response is generally
the limiting factor in the overall system response.
Application Notes
For BCM and VI BRICK application notes on soldering, board layout, and
system design please click on the link below:
Applications Assistance
Please contact Vicor Applications Engineering for assistance,
1-800-927-9474, or email at apps@vicorpower.com.
7 A
[a]
Fuse
F1
Input reflected ripple
measurement point
+
+IN
+OUT
+
R3
10 mΩ
Enable/Disable Switch
C1
47 µF
electrolytic
-OUT
R2
2 kΩ
SW1
TM
RSV
PC
BCM
+OUT
Load
C3
30 µF
D1
-IN
-OUT
–
–
Notes:
1. Source inductance should be no more than 200 nH. If source inductance is greater than 200 nH, additional bypass capacitance may be required.
2. C3 should be placed close to the load.
3. R3 may be ESR of C3 or a separate damping resistor.
4. D1 power good indicator will dim when a module fault is detected.
[a]
See Input Fuse Recommendations section
Figure 15
— VI BRICK BCM test circuit
Bus Converter Module
BC048A080T024FP
vicorpower.com
Rev. 1.0
Page 8 of 11
VICOR [ VICOR CORPORATION ]
