Prerequisite For Switching Function (Continued)
TEST
o
o
o
o
o
25 C
-40 C TO 85 C -55 C TO 125 C
PARAMETER
SYMBOL CONDITIONS
V
(V)
MIN
MAX
MIN
MAX
MIN
MAX
UNITS
CC
Set-up Time
S1, S0 to Clock (Figure 4)
t
-
-
-
-
4.5
20
-
-
-
-
25
-
30
-
ns
SU
SU
Set-up Time
DSL, DSR to Clock (Figure 4)
t
4.5
4.5
4.5
14
0
18
0
-
-
-
21
0
-
-
-
ns
ns
ns
Hold Time
S1, S0 to Clock (Figure 4)
t
H
H
Hold Time
t
0
0
0
Data to Clock (Figure 3)
Switching Specifications Input t , t = 6ns
r
f
o
o
o
o
o
25 C
-40 C TO 85 C -55 C TO 125 C
TEST
V
CC
PARAMETER
HC TYPES
SYMBOL
CONDITIONS
(V)
TYP
MAX
MAX
MAX
UNITS
Propagation Delay,
Clock to Output (Figure 1)
t
, t
PLH PHL
C = 50pF
L
2
-
-
175
35
30
-
220
44
37
-
265
53
45
-
ns
ns
ns
ns
4.5
6
-
Propagation Delay,
Clock to Q
t , t
PLH PHL
-
5
14
Output Transition Time
(Figure 1)
t
, t
TLH THL
C = 50pF
2
4.5
6
-
-
75
15
13
140
28
24
10
-
95
19
16
175
35
30
10
-
110
22
19
210
42
36
10
-
ns
ns
L
-
ns
Propagation Delay,
MR to Output (Figure 2)
t
C = 50pF
L
2
-
ns
PHL
4.5
6
-
ns
-
ns
Input Capacitance
C
-
-
-
-
-
pF
MHz
pF
IN
Maximum Clock Frequency
f
5
60
55
MAX
Power Dissipation
C
5
-
-
-
PD
Capacitance (Notes 4, 5)
HCT TYPES
Propagation Delay,
Clock to Output (Figure 1)
t
, t
PLH PHL
C = 50pF
L
4.5
5
-
15
-
37
-
46
-
56
-
ns
ns
ns
ns
Propagation Delay,
Clock to Q
t , t
PLH PHL
-
Output Transition Times
(Figure 1)
t
, t
TLH THL
C = 50pF
4.5
4.5
15
40
19
50
22
60
L
Propagation Delay,
t
C = 50pF
L
-
PHL
MR to Output (Figure 2)
Input Capacitance
C
-
-
-
-
-
10
-
10
-
10
-
pF
MHz
pF
IN
Maximum Clock Frequency
f
5
5
50
60
MAX
Power Dissipation
C
-
-
-
PD
Capacitance (Notes 4, 5)
NOTES:
3. C
is used to determine the dynamic power consumption, per gate.
PD
4. P = V
2
2
f + ∑ (C V
) where f = Input Frequency, C = Output Load Capacitance, V = Supply Voltage.
CC
D
CC
i
L
CC
i
L
6
VECTRON [ Vectron International, Inc ]
