Preliminary
uP7718
Application Information
The uP7718 is a high performance linear regulator to ensure that VIN does not sag, improving load transient
specifically designed to deliver up to 3A output current with response.
very low input voltage and ultra low dropout voltage. With
Output capacitor: A minimum bulk capacitance of 10uF,
dual-supply configuration, the uP7718 operates with a wide
along with a 0.1uF ceramic decoupling capacitor is
input voltage VIN range from 1.2V to 5.5V and is ideal for
recommended. Increasing the bulk capacitance will improve
applications where VOUT is very close to VIN .
the overall transient response. The use of multiple lower
Supply Voltage for Control Circuit VCNTL
value ceramic capacitors in parallel to achieve the desired
bulk capacitance will not cause stability issues. Although
designed for use with ceramic output capacitors, the uP7718
is extremely tolerant of output capacitor ESR values and
thus will also work comfortably with tantalum output
capacitors.
Unlike other linear regulators that use a P-Channel
MOSFET as the pass transistor, the uP7718 uses an N-
Channel as the pass transistor. N-Channel MOSFET
provides lower on-resistance and better stability meeting
stringent requirements of current generation
microprocessors and other sensitive electronic devices. Thermal Consideration
The drain ofN-Channel MOSFET is connected to VINand
The uP7718 integrates internal thermal limiting function to
the source is connected to VOUT. This requires that the
supply voltage VCNTL for control circuit is at least 1.5V higher
than the output voltage to provide enough overdrive capability
for the pass transistor thus to achieve low dropout and fast
transient response. It is highly recommended to bias the
device with 5V voltage source if available.
protect the device from damage during fault conditions.
However, continuously keeping the junction near the thermal
shutdown temperature may remain possibility to affect
device reliability. It is highly recommended to keep the
junction temperature below the recommended operation
condition 125OC for maximum reliability.
Use a minimum 1uF ceramic capacitor plus a 10Ω resistor
to locally bypass the control voltage.
Power dissipation in the device is calculated as:
PD = (VIN - VOUT) x IOUT + VCNTL x ICNTL
Input/Output Capacitor Selection
It is adequate to neglect power loss with respective to
control circuit VCNTL x ICNTL when considering thermal
management in uP7718 Take the following moderate
operation condition as an example: VIN = 3.3V, VOUT = 1.5V,
The uP7718 has a fast transient response that allows it to
handle large load changes associated with high current
applications. Proper selection of the output capacitor and
its ESR value determines stable operation and optimizes
performance. The typical application circuit shown in Figure
1 was tested with a wide range of different capacitors. The
I
OUT = 1A, the power dissipation is:
PD = (3.3V- 1.5V) x 1A = 1.8W
circuit was found to be unconditionally stable with capacitor This power dissipation is conducted through the package
values from 10uF to 1000uF and ESR ranging from 0.5mΩ into the ambient environment, and, in the process, the
to greater then 75mΩ.
temperature of the die (TJ) rises above ambient. Large power
dissipation may cause considerable temperature raise in
the regulator in large dropout applications. The geometry
of the package and of the printed circuit board (PCB) greatly
influences how quickly the heat is transferred to the PCB
and away from the chip. The most commonly used thermal
metrics for IC packages are thermal resistance from the
chip junction to the ambient air surrounding the package
(θJA):
CNTL
5VCC
POK
VOUT
FB
R4
10R
R3
10K
EN
VOUT
R2
12.5K
C4
option
VIN
VIN
C2
4.7uF
C1
1uF
R1
10K
C3
10uF
GND
θJA = ( TJ -TA ) / PD
θJA specified in the Thermal Information section is measured
in the natural convection at TA = 25OC on a high effective
thermal conductivity test board (4 Layers, 2S2P) of JEDEC
51-7 thermal measurement standard. The case point of
θJC is on the exposed pad for PSOP-8 package.
Figure 1. TypicalApplication Circuit
Input capacitor: A minimum of 4.7uF ceramic capacitor
is recommended to be placed directly next to the VIN pin.
This allows for the device being some distance from any
bulk capacitance on the rail.Additionally, bulk capacitance
may be added closely to the input supply pin of the uP7718
Given power dissipation PD, ambient temperature and
thermal resistance θJA, the junction temperature is
uPI Semiconductor Corp., http://www.upi-semi.com
Rev. P00, File Name: uP7718-DS-P0000
9
UNITPOWER [ ShenZhen XinDeYi Electronics Co., Ltd. ]
