Q-band VCO
CHV2243
Typical Assembly and Bias Configuration
DC and control lines
-V
+V
>= 120pF
V-tune
10
11
12
1
2
3
4
5
6
7
8
9
µ-strip line
13
14
L_out
15
L_aux
µ-strip line
This drawing shows an example of assembly and bias configuration. All the
transistors are internally self biased. The positive and negative voltages can be
respectively connected together (see drawing) according to the recommended
values given in the electrical characteristics table.
For the RF pads the equivalent wire bonding inductance (diameter=25µm) has to
be according to the following recommendation.
Port
Equivalent inductance
(nH)
Approximated wire
length (mm)
RF_out (13)
VCO_out_aux (15)
L_out = 0.28
L_aux = 0.4
0.35
0.5
For a micro-strip configuration a hole in the substrate is recommended for chip
assembly.
Ref. : DSCHV22431074 -15-Mar.-01
5/6
Specifications subject to change without notice
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