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TS32MCF80 参数 Datasheet PDF下载

TS32MCF80图片预览
型号: TS32MCF80
PDF下载: 下载PDF文件 查看货源
内容描述: 80X CF卡 [80X CompactFlash Card]
分类和应用:
文件页数/大小: 82 页 / 2192 K
品牌: TRANSCEND [ TRANSCEND INFORMATION. INC. ]
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TS32M~1GCF80  
80X CompactFlash Card  
D15 - D00  
(PC Card Memory Mode)  
31,30,29,28,  
27,49,48,47,  
6,5,4,3,2,  
I/O  
These lines carry the Data, Commands and Status information between the host  
and the controller. D00 is the LSB of the Even Byte of the Word. D08 is the LSB  
of the Odd Byte of the Word.  
23, 22, 21  
This signal is the same as the PC Card Memory Mode signal.  
D15 - D00  
(PC Card I/O Mode)  
D15 - D00  
(True IDE Mode)  
In True IDE Mode, all Task File operations occur in byte mode on the low order  
bus D[7:0] while all data transfers are 16 bit using D[15:0].  
GND  
--  
1,50  
Ground.  
(PC Card Memory Mode)  
GND  
This signal is the same for all modes.  
This signal is the same for all modes.  
(PC Card I/O Mode)  
GND  
(True IDE Mode)  
Signal Name  
Dir.  
O
Pin  
Description  
-INPACK  
(PC Card Memory Mode)  
43  
This signal is not used in this mode.  
The Input Acknowledge signal is asserted by the CompactFlash Storage Card  
when the card is selected and responding to an I/O read cycle at the address  
that is on the address bus. This signal is used by the host to control the enable of  
any input data buffers between the CompactFlash Storage Card and the CPU.  
-INPACK  
(PC Card I/O Mode)  
Input Acknowledge  
This signal is a DMA Request that is used for DMA data transfers between host  
and device. It shall be asserted by the device when it is ready to transfer data to  
or from the host. For Multiword DMA transfers, the direction of data transfer is  
controlled by -IORD and -IOWR. This signal is used in a handshake manner with  
-DMACK, i.e., the device shall wait until the host asserts -DMACK before  
negating DMARQ, and reasserting DMARQ if there is more data to transfer.  
DMARQ  
(True IDE Mode)  
DMARQ shall not be driven when the device is not selected.  
While a DMA operation is in progress, -CS0 and –CS1 shall be held negated  
and the width of the transfers shall be 16 bits.  
If there is no hardware support for DMA mode in the host, this output signal is not  
used and should not be connected at the host. In this case, the BIOS must report  
that DMA mode is not supported by the host so that device drivers will not  
attempt DMA mode.  
A host that does not support DMA mode and implements both PCMCIA and  
True-IDE modes of operation need not alter the PCMCIA mode connections  
while in True-IDE mode as long as this does not prevent proper operation in any  
mode.  
Transcend Information Inc.  
9