TS512M~
2GSDC
Secure Digital Card
Bus Operating Conditions
• General
Parameter
Peak voltage on all lines
All Inputs
Symbol
Min.
-0.3
Max.
Unit
V
Remark
VDD+0.3
Input Leakage Current
All Outputs
-10
-10
10
10
µA
µA
Output Leakage Current
• Power Supply Voltage
Parameter
Symbol
VDD
Min.
2.0
Max.
3.6
Unit
V
Remark
CMD0, 15,55,ACMD41
commands
Supply voltage
Supply voltage specified in OCR register
2.7
3.6
V
Except CMD0, 15,55,
ACMD41 commands
Supply voltage differentials (VSS1, VSS2
)
-0.3
0.3
V
Power up time
250
ms
From 0v to VDD Min.
Note. The current consumption of any card during the power-up procedure must not exceed 10 mA.
• Bus Signal Line Load
The total capacitance CL the CLK line of the SD Memory Card bus is the sum of the bus master capacitance CHOST, the bus
capacitance CBUS itself and the capacitance CCARD of each card connected to this line:
CL = CHOST + CBUS + Ν*CCARD
Where N is the number of connected cards. Requiring the sum of the host and bus capacitances not to exceed 30 pF for
up to 10 cards, and 40 pF for up to 30 cards, the following values must not be exceeded:
Parameter
Bus signal line capacitance
Single card capacitance
Symbol
CL
Min.
10
Max.
100
10
Unit
pF
Remark
fPP ≤ 20 MHz, 7 cards
CCARD
pF
Maximum signal line inductance
Pull-up resistance inside card (pin1)
16
nH
kΩ
fPP ≤ 20 MHz
RDAT3
90
May be used for card
detection
Note that the total capacitance of CMD and DAT lines will be consist of CHOST, CBUS and one CCARD only since they are
connected separately to the SD Memory Card host.
Parameter
Pull-up resistance
Symbol
RCMD, RDAT
CL
Min.
10
Max.
100
Unit
kΩ
Remark
To prevent bus floating
fPP ≤ 5 MHz, 21 cards
Bus signal line capacitance
250
pF
3
Transcend Information Inc.
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