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TS2GDOM44H 参数 Datasheet PDF下载

TS2GDOM44H图片预览
型号: TS2GDOM44H
PDF下载: 下载PDF文件 查看货源
内容描述: 44针IDE闪存模块(水平) [44-Pin IDE Flash Module(Horizontal)]
分类和应用: 闪存
文件页数/大小: 9 页 / 291 K
品牌: TRANSCEND [ TRANSCEND INFORMATION. INC. ]
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Transcend  
44-Pin ID  
E Flash M  
odule (Horizo  
ntal)  
128M ~ 4G  
B
Pin Description  
Pin No.  
Signal  
I/O*  
Description  
01  
-RESET  
I
Hardware reset signal from the host.  
17, 15, 13, 11, 09, 07, DD0 ~ DD15 (Device Data)  
05, 03, 04, 06, 08, 10,  
16-bit bi-direction Data Bus. DD(7:0) are used for 8-bit  
register transfers.  
I/O  
12, 14, 16, 18  
21  
DMARQ (DMA Request)  
-DIOW (I/O Write)  
For DMA data transfers. Device will assert DMARQ  
when the device is ready to transfer data to or from the  
host.  
O
I
23  
This is the strobe signal used by the host to write to the  
device register or Data port.  
STOP (Stop UDMA Burst)  
-DIOR (I/O Read)  
The host asserts this signal during an UDMA burst to  
stop the DMA burst.  
25  
This is the strobe signal used by the host to read from  
the device register or the Data port.  
-HDMARDY (UDMA ready)  
When UDMA mode DMA Read is ready, -HDMARDY  
should be asserted by the host to indicate that the host is  
ready to receive DMA data-in burst.  
I
HSTROBE (UDMA Strobe)  
IORDY (I/O channel ready)  
HSTROBE receives the data-out strobe signal from the  
host for an UDMA burst.  
27  
28  
This signal is used to temporarily stop the host register  
access (read or write) when the device is not ready to  
respond to a data transfer request.  
O
DDMARDY (UDMA ready)  
The device will assert this signal to indicate that the  
device is ready to receive UDMA data-out burst.  
DSTROBE (UDMA data  
strobe)  
When UDMA mode DMA Read is active, this signal is  
the data-in strobe generated by the device.  
CSEL (Cable select)  
This pin is used to configure this device as Device 0 or  
Device 1. When this pin is grounded, this device is  
configured as Device 0. When this pin is High, this  
device is configured as Device 1.  
I
29  
31  
32  
-DMACK (DMA  
acknowledge)  
This signal is used by the host in response to DMARQ to  
initiate DMA transfer.  
I
INTRQ (Interrupt)  
When this device is selected, this signal is the active  
high Interrupt Request to the host.  
O
IOCS16B  
During PIO transfer mode 0, 1 or 2, this pin indicates to  
the host the 16-bit data port has been addressed and the  
device is prepared to send or receive a 16-bit data word.  
When transferring in PIO mode 3, 4, or above, this signal  
should not be used by the host, and all transfers will be  
16-bit. When transferring in DMA mode, the host must  
use a 16-bit DMA channel and this signal will not be  
asserted.  
O
6
Transcend Information Inc.  
Ver 1.2