TS7003
ELECTRICAL SPECIFICATIONS
VDD = +2.7V to +3.6V; fSCLK = 4.8MHz, 50% duty cycle, 16 clocks/conversion cycle, 300ksps; 4.7μF capacitor at
REF; TA = -40ºC to +85ºC, unless otherwise noted. Typical values apply at TA = +25°C.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC ACCURACY (See Note 1)
Resolution
Relative Accuracy
Differential Nonlinearity
Offset Error
12
Bits
LSB
LSB
LSB
LSB
INL
DNL
ZE
See Note 2
No missing codes over temperature
±1.0
±1.0
±6.0
±6.0
Gain Error
GE
See Note 3
Gain-Error Temperature Coefficient
TCGE
±1.6
70
ppm/°C
DYNAMIC SPECIFICATIONS (fIN = 75kHz sine wave, 2.5VPP, fSAMPLE = 300ksps, fSCLK = 4.8MHz)
Signal-to-Noise
Plus Distortion Ratio
SINAD
dB
Total Harmonic Distortion
Spurious-Free Dynamic Range
Intermodulation Distortion
Full-Power Bandwidth
Full-Linear Bandwidth
CONVERSION RATE
Conversion Time
THD
SFDR
IMD
FPBW
FLBW
Including the 5th harmonic
-80
80
76
10
300
dB
dB
dB
MHz
kHz
fA = 73kHz, fB = 77kHz
-3dB point
SINAD > 68dB
tCONV
tACQ
tAD
See Note 4
3.3
μs
ns
ns
Track/Hold Acquisition Time
Aperture Delay
625
10
Aperture Jitter
tAJ
< 50
ps
Serial Clock Frequency
Duty Cycle
tSCLK
0.5
40
4.8
60
MHz
%
ANALOG INPUT (AIN)
Input Voltage Range
Input Capacitance
INTERNAL REFERENCE
REF Output Voltage
REF Short-Circuit Current
REF Output Tempco
Load Regulation
VIN
CINA
0
VREF
2.515
V
pF
10
VREF
2.485
2.50
15
30
3
V
mA
ppm/°C
mV/mA
μF
TA = +25°C
TCVREF
See Note 5; 0 to 0.75mA output load
5
10
Capacitive Bypass at REF
4.7
2.4
DIGITAL INPUTS (SCLK, ꢀ, ꢀꢁꢂꢃ)
Input High Voltage
Input Low Voltage
Input Hysteresis
Input Leakage
VINH
VINL
VHYST
IIN
V
V
V
μA
pF
0.8
±1
0.2
15
VINL = 0V or VINH = VDD
Input Capacitance
CIND
DIGITAL OUTPUT (DOUT)
Output Voltage Low
Output Voltage High
Three-State Leakage Current
Three-State Output Capacitance
POWER SUPPLY
VOL
VOH
IL
ISINK = 5mA
ISOURCE = 0.5mA
VCS = +3V
0.4
VDD - 0.5
V
V
μA
pF
±10
15
COUT
VCS = +3V
Positive Supply Voltage
Positive Supply Current
Shutdown Supply Current
Power-Supply Rejection
VDD
IDD
See Note 6
See Note 7; VDD = +3.6V
2.7
3.6
1.25
2
V
0.95
0.2
mA
μA
mV
ISHꢀꢁ
PSR
SCLK = VDD, SHꢀꢁ = GND
VDD = +2.7V to 3.6V, midscale input
±0.5
±2.5
TS7003DS r1p0
Page 3
RTFDS
TOUCHSTONE [ TOUCHSTONE SEMICONDUCTOR INC ]
