THC63LVD824 _Rev2.0
Pin Description
Pin Name
RA1+, RA1-
RB1+, RB1-
Pin #
78, 77
80, 79
83, 82
87, 86
85, 84
90, 89
92, 91
95, 94
99, 98
97, 96
Type
Description
LVDS IN
LVDS IN
LVDS IN
LVDS IN
The 1st Link. The 1st pixel input data when Dual Link.
RC1+, RC1-
RD1+, RD1-
RCLK1+, RCLK1-
RA2+, RA2-
RB2+, RB2-
RC2+, RC2-
RD2+, RD2-
RCLK2+, RCLK2-
LVDS IN LVDS Clock Input for 1st Link.
LVDS IN
LVDS IN
LVDS IN
LVDS IN
The 2nd Link. These pins are disabled when Single Link.
LVDS IN LVDS Clock Input for 2nd Link.
52, 51, 50, 47,
46, 45, 44, 43
62, 61, 60, 59,
58, 55, 54, 53
72, 71, 68, 67,
66, 65, 64, 63
19, 18, 17, 14,
13, 12, 11, 10
29, 26, 25, 24,
23, 22, 21, 20
39, 38, 37, 36,
35, 32, 31, 30
R17 ~ R10
G17 ~ G10
B17 ~ B10
R27 ~ R20
G27 ~ G20
B27 ~ B20
OUT
OUT
OUT
OUT
OUT
OUT
The 1st Pixel Data Outputs.
The 2nd Pixel Data Outputs.
DE
75
74
73
40
OUT
OUT
OUT
OUT
Data Enable Output.
Vsync Output.
Hsync Output.
Clock Output.
VSYNC
HSYNC
CLKOUT
Output Driverbility Select.
H: High power, L: Low power.
Output Clock Triggering Edge Select.
H: Rising edge, L: Falling edge.
DRVSEL
R/F
9
8
IN
IN
Pixel Data Mode.
MODE1
MODE0
Mode
Dual Link
Single Link
MODE1, MODE0
/PDWN
6, 5
4
IN
IN
L
L
L
H
H: Normal operation,
L: Power down (all outputs are pulled to ground)
15, 27, 33, 41,
48, 56, 69
3, 7, 16, 28, 34,
42, 49, 57, 70
VCC
GND
Power
Power Supply Pins for TTL outputs and digital circuitry.
Ground
Ground Pins for TTL outputs and digital circuitry.
LVDS VCC
LVDS GND
81,93
76, 88, 100
Power
Ground
Power Supply Pins for LVDS inputs.
Ground Pins for LVDS inputs.
Copyright 2000-2003 THine Electronics, Inc. All rights reserved
3
THine Electronics, Inc.
THINE [ THINE ELECTRONICS, INC. ]
