DS_8009C_025
73S8009C Data Sheet
Figures
Figure 1: 73S8009C Block Diagram.........................................................................................................3
Figure 2: 73S8009C 32-Pin QFN Pinout ..................................................................................................6
Figure 3: 73S8009C 20-Pin QFN Pinout ..................................................................................................6
Figure 4: Typical 73S8009C Application Schematic ...............................................................................17
Figure 5: 73S8009C Logical Block Diagram...........................................................................................19
Figure 6: Activation Sequence...............................................................................................................21
Figure 7: Deactivation Sequence...........................................................................................................22
Figure 8: OFF Activity............................................................................................................................22
Figure 9: CS Timing Definitions..............................................................................................................23
Figure 10: I/O and I/OUC State Diagram................................................................................................24
Figure 11: I/O – I/OUC Delays - Timing Diagram....................................................................................25
Figure 12: On_Off Pin............................................................................................................................26
Figure 13: Open Drain type – OFF and RDY..........................................................................................26
Figure 14: Power Input/Output Circuit, VDD, LIN, VPC, VCC, VP...........................................................26
Figure 15: Smart Card CLK Driver Circuit ..............................................................................................27
Figure 16: Smart Card RST Driver Circuit ..............................................................................................27
Figure 17: Smart Card IO, AUX1, and AUX2 Interface Circuit.................................................................28
Figure 18: Smart Card I/OUC, AUX1UC and AUX2UC Interface Circuit..................................................28
Figure 19: General Input Circuit.............................................................................................................29
Figure 20: OFF_REQ Interface Circuit ...................................................................................................29
Figure 22: 20-Pin QFN Package Dimensions.........................................................................................30
Figure 22: 32-Pin QFN Package Dimensions.........................................................................................31
Tables
Table 1: 73S8009C Pin Definitions ..........................................................................................................7
Table 2: Absolute Maximum Device Ratings ..........................................................................................10
Table 3: Recommended Operating Conditions.......................................................................................11
Table 4: DC Smart Card Interface Requirements ...................................................................................11
Table 5: Digital Signals Characteristics ..................................................................................................14
Table 6: DC Characteristics ...................................................................................................................15
Table 7: Voltage / Temperature Fault Detection Circuits.........................................................................15
Table 8: Thermal Characteristics ...........................................................................................................15
Table 9: Order Numbers and Packaging Marks......................................................................................32
Rev. 1.4
5
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
