DS_8009C_025
73S8009C Data Sheet
Pin
Name
Pin
Pin
Equivalent
Circuit
Type
Description
(QFN32) (QFN20)
CMDVCC%
CMDVCC#
4
5
3
4
I
I
Figure 19
Logic low on one or both of these pins will
cause the LDO to ramp the Vcc supply to the
smart card and smart card interface to the
value described in the following table.
CMDVCC% CMDVCC# Vcc Output Voltage
0
0
1
1
0
1
0
1
1.8 V
5.0 V
3.0 V
LDO Off
Note: See the description of the Card Power
Supply for more detail on the operation of
CMDVCC% and CMDVCC#.
RSTIN
RDY
6
8
5
I
Figure 19 Reset Input: This signal is the reset command
to the card.
N/A
Figure 13 Signal to controller indicating the 73S8009C is
ready because VCC is above the required value
after CMDVCC% and/or CMDVCC# is asserted
low. A 20 kΩ pull-up resistor to VDD is provided
internally. Pull-up is disabled in Power down
state and CS=0 modes.
ON_OFF
24
15
I
Figure 12 Power control pin. Connected to normally
open SPST switch to ground. Closing switch
for duration greater than de-bounce period will
turn 73S8009C circuit “on.” If 73S8009C is
“on,” closing switch will turn 73S8009C to “off”
state after the de-bounce period and
OFF_REQ/OFF_ACK handshake.
OFF_REQ
OFF_ACK
11
N/A
N/A
O
Figure 20 Digital output. Request to the host system
controller to turn the 73S8009C off. If ON_OFF
switch is closed (to ground) for de-bounce
duration and circuit is “on,” OFF_REQ will go
high (Request to turn OFF). Connected to
OFF_ACK via 100 kΩ internal resistor.
9
I
Figure 19 Setting OFF_ACK high will power “off” all
analog functions and disconnect the 73S8009C
from VBAT or VPC. The pin has an internal
100 kΩ resistor connection to OFF_REQ so
that when not connected or no host interaction
is required, the Acknowledge will be true and
the circuit will turn “off” immediately with
OFF_REQ.
Rev. 1.4
9
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
