73S8009CN Data Sheet
DS_8009CN_026
Equivalent
Circuit
Pin
Name
Pin
Number
Type
Description
CLK
16
O
Figure 15
Card clock: provides clock signal (CLK) to card. CLK
is the pass through of the signal on pin CLKIN.
Internal control logic will hold CLK low when card is
not activated or VCC is too low. Will be tri-stated
when SC/USB is set low.
PRES
14
I
Figure 19
Figure 13
Smart card Presence switch: Active high indicates
card is present.
Smart card activation will not be permitted unless
PRES is active.
VCC
GND
19
17
PSO
Card power supply – logically controlled by
sequencer, output of LDO regulator. Requires an
external 0.47uF low ESR filter capacitor to GND.
GND
I
–
Card ground.
Host Processor Interface
CS
12
Figure 19
Chip Select. When CS = 1, the control and signal
pins are configured normally. When CS is set low,
CMDVCC%, RSTIN, and CMDVCC# are latched.
I/OUC, AUX1UC, and AUX2UC are set to
high-impedance pull-up mode and do not pass data
to or from the smart card. Signals RDY and OFF are
disabled to prevent a low output and the internal
pull-up resistors are disconnected. Should be tied to
VDD when a single 73S8009CN is used.
32
O
Figure 12
OFF
Interrupt signal to the processor. Active Low -
Multi-function indicating fault conditions and card
presence. Open drain output configuration – It
includes an internal 20kΩ pull-up to VDD. Pull-up is
disabled in Power down state and CS = 0 modes.
1
2
IO
IO
Figure 18
Figure 18
I/OUC
System controller data I/O to/from the card. Includes
an 11kΩ pull-up resistor to VDD.
AUX1UC
System controller auxiliary data I/O to/from the card
for synchronous / asynchronous operation mode.
Connection to AUX1 is opened when SC/USB is low.
Includes an 11kΩ pull-up resistor to VDD.
3
IO
I
Figure 18
Figure 19
AUX2UC
System controller auxiliary data I/O to/from the card
for synchronous / asynchronous operation mode.
Connection to AUX2 is opened when SC/USB is low.
Includes an 11kΩ pull-up resistor to VDD.
SC/USB
13
Smart Card Interface enable, USB interface disable.
Pin is provided with a weak pull-up.
When high, the 73S8009CN operates in
synchronous / asynchronous operation mode.
When low, CLK, RST I/O, AUX1, and AUX2 are
tri-stated. Pin AUX1 is connected to pin DP and pin
AUX2 is connected to pin DM.
DP
25
IO
Figure 14
USB D+ connection to / from USB controller.
When SC/USB is set low, this pin is electrically
connected to the AUX1 pin, otherwise it is isolated.
6
Rev. 1.4
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
