73S1113F
EMV Smart-Card Terminal Controller
with Built-in ISO-7816 Interface and USB
DATA SHEET
TYPICAL APPLICATION SCHEMATIC
Decoupling capacitors should be
located close to U2.
VPD
VPA
C3
C4
C5
C6
+
+
C1
C2
0.1uF 0.1uF 0.1uF 0.1uF
10uF
10uF
C12
+
C11
0.1uF
C41 and C42 to be placed
within 1cm of U4
10uF
U4
3.3V
5
V_OUT
to VPA, VPC, VPD, VPG
1
2
3
V_IN
C42
+
GND
4.7uF
Charge Pump Capacitor, C24, to be
placed on bottom side of board and
within 5mm of U2 pins.
It should be away from Smartcard
signal lines.
Length and width of USB D+
and D- tracks should be
matched and routed away from
smart card CLK and VCCs
ON/OFF
BYPASS
4
+
C41
2.2uF
+
J5
C43
+
LP2985
LDO
+
5
4
3
2
1
6
GND
GND
D+
0.1uF
GND
D+
CARD DETECT
POLARITY SELECT
VPC
DPLUS
R12
R13
33
33
INT2
DMINUS
VBUS
3.3V
JP7 HIGH
D-
ACTIVE
D-
JP8
VCC track should be
wider than 0.5mm.
+5VDC
VCC
GND
1
2
3
1
2
3
DET_POL
3.3V
D2
D1
VPD
USB_CONN_4
ACTIVE
LOW
R16
10k
Zener diodes are provided for
additional ESD protection on
the USB interface. Place
SMARTCARD
SLOT
R20
10k
J6
1
2
3
4
5
6
7
8
SCx_CLK track should be
routed away from other
Smartcard signals.
VCC
RST
CLK
C4
SC2_RST
SC2_C4
30-SWITCH
KEYPAD
R21
diodes near the USB connector
0
S2
S3
1
F2
S4
S5
S6
GND
VPP
I/O
C24
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
1
2
2
2
2
2
1
1
1
1
1
2
1
2
SC2_IO
SC2_C8
F1
F3
ON/CE
A
VPA
VPD
C8
0.68uF
DET2
9
SW-1
SW-2
10
S7
S8
S9
S10
1
1
1
1
1
1
1
1
2
1
2
3
UP
SB11
1
1
2
Smart Card Connector
U5
S12
S13
S14
S15
S16
2
2
2
2
2
2
OSC_IN_12
OSC_OUT_12
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
4
5
6
DOWN
C
OSCIN12
OSCOUT12
VND
RST2
C42
2
3
C82
4
VPD
VPD
IO2
LCDDAT0
LCDDAT1
LCDDAT2
LCDDAT3
LCD_EN
LCD_RW
LCD_RS
5
S17
S18
S19
S20
S21
LCDAT0
LCDAT1
LCDAT2
LCDAT3
LCD_Enable
LCD_RW
LCD_RS
ROW4
VNC
1
1
6
CLK2
VND
7
7
8
9
CLR
D
8
SCLK
SIO
9
2.4k
DET2
10
11
12
13
14
15
16
DET_POL
DET_CARD2
USR0
VPD
S22
S23
S24
S25
S26
R26
VPD
.
0
/
ENTER
E
TXD
USR1
USR2
VND
LCD DISPLAY SYSTEM
16 CHARACTER BY
LINES
ROW3
ROW2
2
U6
ROW1
USR3
TXD
RXD
DMC16204
73S1113
COL4
5V
3.3V
VPD
R28
10k
C39
1uF
+
C40
RV1
10K
COL3
0.1uF
2
COL2
LCDDAT0
LCDDAT1
LCDDAT2
LCDDAT3
COL1
LCD
BRIGHTNESS
ADJUST
COL0
Y1
OSC_IN_12
OSC_OUT_12
3.3V
12.000MHz
C30
C33
0.1uF
C29
3.3V
U3
22pF
22pF
J1
ISP
MAX3237CAI
1
2
C35
27
4
28
25
1
C36
V+
V-
C1+
C1-
C2+
C2-
3
NO_ISP
0.1uF
0.1uF
3.3V
ISP SELECT
DB9_RS232
P1
C37
C38
0.1uF
0.1uF
+
C34
10uF
3
5
9
4
8
3
7
2
6
1
5
6
24
23
22
19
17
R35
T1OUT
T2OUT
T3OUT
T4OUT
T5OUT
T1IN
T2IN
T3IN
T4IN
T5IN
10k
7
10
12
16
21
20
18
R1OUTBF
R1OUT
R2OUT
R3OUT
8
9
R1IN
R2IN
R3IN
11
13
14
SERIAL
PORT
ENB
SHDNB
Page: 7 of 19
© 2005 TERIDIAN Semiconductor Corporation
Rev 2.3
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
