VREF
PULSEW PULSER V3P3A
GNDA
GNDA
IA
V A
IB
VB
IC
∆Σ ADC
CONVERTER
GNDD
MUX
VOLT
REG
V3P3A
V3P3D
-
VC
+
21
GNDD
GNDD
V2P5
VX
TEMP
VREF
VREF
2.5V to logic
MUXSYNC
VBIAS
(1.5V)
CALCULATIONS
SSIINTERFACE
SSCLK
SSDATA
SFR
OUTPUT VALUES:
Whr (A, B, C)
VARhr (A, B, C)
VAhr (A, B, C)
Vrms (A, B, C)
Irms (A, B, C)
Iphase (A, B, C)
SRDY
Frequency (Selected Phase)
Temperature
SYSTEM CLOCKS
CK_GEN
CKTEST
ALARMS:
Voltage Sag (A, B, C)
Zero Cross (Selected Phase)
Over-Voltage (All)
Over-Current (All)
D0-D7 State Change
BATTERY BACKUP
XIN
OSC
(32KHz)
XOUT
RTC
VBAT
PULSE4
PULSE3
DATA
RAM
CONTROL
MISC
PULSE_INIT
BAUDRATE
TX
IRQZ
UART
RX
I/O CONTROL
D0
D1
D2
D3
D4
D5
D6
D7
Change of State
(D0...D7)
TEST
VFLT
VX
VBIAS
(1.5V)
GNDD
V3P3
FAULTDETECT
TMUXOUT
RESERVED
March 3, 2008
64 PINS -- 64 TQFP
RESETZ
Figure 2: IC Functional Block Diagram
ELECTRICAL SPECIFICATIONS
Page: 2 of 60
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